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author | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
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committer | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
commit | 5d2f529c9b83d5f769258928b5ddd82f4dc9979e (patch) | |
tree | 65ecb999d7bfda861006ffba75f375c1d7c8260d /target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch | |
parent | c8a6c583fc5f5c0834f993b591d6bb52d958c99a (diff) | |
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mediatek: bump to v4.4
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 49064
Diffstat (limited to 'target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch')
-rw-r--r-- | target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch b/target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch deleted file mode 100644 index 432c48e..0000000 --- a/target/linux/mediatek/patches/0043-ARM-dts-mt8127-enable-basic-SMP-bringup-for-mt8127.patch +++ /dev/null @@ -1,48 +0,0 @@ -From e75f8b666c976aff2aa30b967f74df021d800993 Mon Sep 17 00:00:00 2001 -From: "Joe.C" <yingjoe.chen@mediatek.com> -Date: Fri, 1 May 2015 15:43:30 +0800 -Subject: [PATCH 43/76] ARM: dts: mt8127: enable basic SMP bringup for mt8127 - -Add arch timer node to enable arch-timer support. MT8127 firmware -doesn't correctly setup arch-timer frequency and CNTVOFF, add -properties to workaround this. - -This also set cpu enable-method to enable SMP. - -Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> ---- - arch/arm/boot/dts/mt8127.dtsi | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/arch/arm/boot/dts/mt8127.dtsi -+++ b/arch/arm/boot/dts/mt8127.dtsi -@@ -23,6 +23,7 @@ - cpus { - #address-cells = <1>; - #size-cells = <0>; -+ enable-method = "mediatek,mt81xx-tz-smp"; - - cpu@0 { - device_type = "cpu"; -@@ -72,6 +73,21 @@ - }; - }; - -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupt-parent = <&gic>; -+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | -+ IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | -+ IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | -+ IRQ_TYPE_LEVEL_LOW)>, -+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | -+ IRQ_TYPE_LEVEL_LOW)>; -+ clock-frequency = <13000000>; -+ arm,cpu-registers-not-fw-configured; -+ }; -+ - soc { - #address-cells = <2>; - #size-cells = <2>; |