diff options
author | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
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committer | John Crispin <john@openwrt.org> | 2016-03-21 20:42:51 +0000 |
commit | 5d2f529c9b83d5f769258928b5ddd82f4dc9979e (patch) | |
tree | 65ecb999d7bfda861006ffba75f375c1d7c8260d /target/linux/mediatek/patches/0052-pinctrl-mediatek-add-ies-smt-control-to-common-code.patch | |
parent | c8a6c583fc5f5c0834f993b591d6bb52d958c99a (diff) | |
download | mtk-20170518-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.zip mtk-20170518-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.tar.gz mtk-20170518-5d2f529c9b83d5f769258928b5ddd82f4dc9979e.tar.bz2 |
mediatek: bump to v4.4
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 49064
Diffstat (limited to 'target/linux/mediatek/patches/0052-pinctrl-mediatek-add-ies-smt-control-to-common-code.patch')
-rw-r--r-- | target/linux/mediatek/patches/0052-pinctrl-mediatek-add-ies-smt-control-to-common-code.patch | 470 |
1 files changed, 0 insertions, 470 deletions
diff --git a/target/linux/mediatek/patches/0052-pinctrl-mediatek-add-ies-smt-control-to-common-code.patch b/target/linux/mediatek/patches/0052-pinctrl-mediatek-add-ies-smt-control-to-common-code.patch deleted file mode 100644 index 7d77dc5..0000000 --- a/target/linux/mediatek/patches/0052-pinctrl-mediatek-add-ies-smt-control-to-common-code.patch +++ /dev/null @@ -1,470 +0,0 @@ -From 32ea3b91046bea40cd1a7a4f16a24d75f53ca92a Mon Sep 17 00:00:00 2001 -From: Hongzhou Yang <hongzhou.yang@mediatek.com> -Date: Mon, 18 May 2015 23:11:16 -0700 -Subject: [PATCH 52/76] pinctrl: mediatek: add ies/smt control to common code. - -Input enable and smt setting have different register, -modify code to fix it. - -Several mediatek soc use similar input enable/smt setting -procedure as mt8173, some soc use generic input enable/smt -setting, some soc has no input enable/smt setting. Adding -common code to handle all those cases, so future soc driver -can use it. - -Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> ---- - drivers/pinctrl/mediatek/pinctrl-mt8173.c | 201 +++++++++++++------------ - drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 82 +++++++--- - drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 31 +++- - 3 files changed, 198 insertions(+), 116 deletions(-) - ---- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c -+++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c -@@ -18,6 +18,7 @@ - #include <linux/of_device.h> - #include <linux/pinctrl/pinctrl.h> - #include <linux/regmap.h> -+#include <linux/pinctrl/pinconf-generic.h> - #include <dt-bindings/pinctrl/mt65xx.h> - - #include "pinctrl-mtk-common.h" -@@ -25,28 +26,6 @@ - - #define DRV_BASE 0xb00 - --/** -- * struct mtk_pin_ies_smt_set - For special pins' ies and smt setting. -- * @start: The start pin number of those special pins. -- * @end: The end pin number of those special pins. -- * @offset: The offset of special setting register. -- * @bit: The bit of special setting register. -- */ --struct mtk_pin_ies_smt_set { -- unsigned int start; -- unsigned int end; -- unsigned int offset; -- unsigned char bit; --}; -- --#define MTK_PIN_IES_SMT_SET(_start, _end, _offset, _bit) \ -- { \ -- .start = _start, \ -- .end = _end, \ -- .bit = _bit, \ -- .offset = _offset, \ -- } -- - static const struct mtk_pin_spec_pupd_set_samereg mt8173_spec_pupd[] = { - MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */ - MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */ -@@ -97,80 +76,114 @@ static int mt8173_spec_pull_set(struct r - ARRAY_SIZE(mt8173_spec_pupd), pin, align, isup, r1r0); - } - --static const struct mtk_pin_ies_smt_set mt8173_ies_smt_set[] = { -- MTK_PIN_IES_SMT_SET(0, 4, 0x930, 1), -- MTK_PIN_IES_SMT_SET(5, 9, 0x930, 2), -- MTK_PIN_IES_SMT_SET(10, 13, 0x930, 10), -- MTK_PIN_IES_SMT_SET(14, 15, 0x940, 10), -- MTK_PIN_IES_SMT_SET(16, 16, 0x930, 0), -- MTK_PIN_IES_SMT_SET(17, 17, 0x950, 2), -- MTK_PIN_IES_SMT_SET(18, 21, 0x940, 3), -- MTK_PIN_IES_SMT_SET(29, 32, 0x930, 3), -- MTK_PIN_IES_SMT_SET(33, 33, 0x930, 4), -- MTK_PIN_IES_SMT_SET(34, 36, 0x930, 5), -- MTK_PIN_IES_SMT_SET(37, 38, 0x930, 6), -- MTK_PIN_IES_SMT_SET(39, 39, 0x930, 7), -- MTK_PIN_IES_SMT_SET(40, 41, 0x930, 9), -- MTK_PIN_IES_SMT_SET(42, 42, 0x940, 0), -- MTK_PIN_IES_SMT_SET(43, 44, 0x930, 11), -- MTK_PIN_IES_SMT_SET(45, 46, 0x930, 12), -- MTK_PIN_IES_SMT_SET(57, 64, 0xc20, 13), -- MTK_PIN_IES_SMT_SET(65, 65, 0xc10, 13), -- MTK_PIN_IES_SMT_SET(66, 66, 0xc00, 13), -- MTK_PIN_IES_SMT_SET(67, 67, 0xd10, 13), -- MTK_PIN_IES_SMT_SET(68, 68, 0xd00, 13), -- MTK_PIN_IES_SMT_SET(69, 72, 0x940, 14), -- MTK_PIN_IES_SMT_SET(73, 76, 0xc60, 13), -- MTK_PIN_IES_SMT_SET(77, 77, 0xc40, 13), -- MTK_PIN_IES_SMT_SET(78, 78, 0xc50, 13), -- MTK_PIN_IES_SMT_SET(79, 82, 0x940, 15), -- MTK_PIN_IES_SMT_SET(83, 83, 0x950, 0), -- MTK_PIN_IES_SMT_SET(84, 85, 0x950, 1), -- MTK_PIN_IES_SMT_SET(86, 91, 0x950, 2), -- MTK_PIN_IES_SMT_SET(92, 92, 0x930, 13), -- MTK_PIN_IES_SMT_SET(93, 95, 0x930, 14), -- MTK_PIN_IES_SMT_SET(96, 99, 0x930, 15), -- MTK_PIN_IES_SMT_SET(100, 103, 0xca0, 13), -- MTK_PIN_IES_SMT_SET(104, 104, 0xc80, 13), -- MTK_PIN_IES_SMT_SET(105, 105, 0xc90, 13), -- MTK_PIN_IES_SMT_SET(106, 107, 0x940, 4), -- MTK_PIN_IES_SMT_SET(108, 112, 0x940, 1), -- MTK_PIN_IES_SMT_SET(113, 116, 0x940, 2), -- MTK_PIN_IES_SMT_SET(117, 118, 0x940, 5), -- MTK_PIN_IES_SMT_SET(119, 124, 0x940, 6), -- MTK_PIN_IES_SMT_SET(125, 126, 0x940, 7), -- MTK_PIN_IES_SMT_SET(127, 127, 0x940, 0), -- MTK_PIN_IES_SMT_SET(128, 128, 0x950, 8), -- MTK_PIN_IES_SMT_SET(129, 130, 0x950, 9), -- MTK_PIN_IES_SMT_SET(131, 132, 0x950, 8), -- MTK_PIN_IES_SMT_SET(133, 134, 0x910, 8) -+static const struct mtk_pin_ies_smt_set mt8173_smt_set[] = { -+ MTK_PIN_IES_SMT_SPEC(0, 4, 0x930, 1), -+ MTK_PIN_IES_SMT_SPEC(5, 9, 0x930, 2), -+ MTK_PIN_IES_SMT_SPEC(10, 13, 0x930, 10), -+ MTK_PIN_IES_SMT_SPEC(14, 15, 0x940, 10), -+ MTK_PIN_IES_SMT_SPEC(16, 16, 0x930, 0), -+ MTK_PIN_IES_SMT_SPEC(17, 17, 0x950, 2), -+ MTK_PIN_IES_SMT_SPEC(18, 21, 0x940, 3), -+ MTK_PIN_IES_SMT_SPEC(29, 32, 0x930, 3), -+ MTK_PIN_IES_SMT_SPEC(33, 33, 0x930, 4), -+ MTK_PIN_IES_SMT_SPEC(34, 36, 0x930, 5), -+ MTK_PIN_IES_SMT_SPEC(37, 38, 0x930, 6), -+ MTK_PIN_IES_SMT_SPEC(39, 39, 0x930, 7), -+ MTK_PIN_IES_SMT_SPEC(40, 41, 0x930, 9), -+ MTK_PIN_IES_SMT_SPEC(42, 42, 0x940, 0), -+ MTK_PIN_IES_SMT_SPEC(43, 44, 0x930, 11), -+ MTK_PIN_IES_SMT_SPEC(45, 46, 0x930, 12), -+ MTK_PIN_IES_SMT_SPEC(57, 64, 0xc20, 13), -+ MTK_PIN_IES_SMT_SPEC(65, 65, 0xc10, 13), -+ MTK_PIN_IES_SMT_SPEC(66, 66, 0xc00, 13), -+ MTK_PIN_IES_SMT_SPEC(67, 67, 0xd10, 13), -+ MTK_PIN_IES_SMT_SPEC(68, 68, 0xd00, 13), -+ MTK_PIN_IES_SMT_SPEC(69, 72, 0x940, 14), -+ MTK_PIN_IES_SMT_SPEC(73, 76, 0xc60, 13), -+ MTK_PIN_IES_SMT_SPEC(77, 77, 0xc40, 13), -+ MTK_PIN_IES_SMT_SPEC(78, 78, 0xc50, 13), -+ MTK_PIN_IES_SMT_SPEC(79, 82, 0x940, 15), -+ MTK_PIN_IES_SMT_SPEC(83, 83, 0x950, 0), -+ MTK_PIN_IES_SMT_SPEC(84, 85, 0x950, 1), -+ MTK_PIN_IES_SMT_SPEC(86, 91, 0x950, 2), -+ MTK_PIN_IES_SMT_SPEC(92, 92, 0x930, 13), -+ MTK_PIN_IES_SMT_SPEC(93, 95, 0x930, 14), -+ MTK_PIN_IES_SMT_SPEC(96, 99, 0x930, 15), -+ MTK_PIN_IES_SMT_SPEC(100, 103, 0xca0, 13), -+ MTK_PIN_IES_SMT_SPEC(104, 104, 0xc80, 13), -+ MTK_PIN_IES_SMT_SPEC(105, 105, 0xc90, 13), -+ MTK_PIN_IES_SMT_SPEC(106, 107, 0x940, 4), -+ MTK_PIN_IES_SMT_SPEC(108, 112, 0x940, 1), -+ MTK_PIN_IES_SMT_SPEC(113, 116, 0x940, 2), -+ MTK_PIN_IES_SMT_SPEC(117, 118, 0x940, 5), -+ MTK_PIN_IES_SMT_SPEC(119, 124, 0x940, 6), -+ MTK_PIN_IES_SMT_SPEC(125, 126, 0x940, 7), -+ MTK_PIN_IES_SMT_SPEC(127, 127, 0x940, 0), -+ MTK_PIN_IES_SMT_SPEC(128, 128, 0x950, 8), -+ MTK_PIN_IES_SMT_SPEC(129, 130, 0x950, 9), -+ MTK_PIN_IES_SMT_SPEC(131, 132, 0x950, 8), -+ MTK_PIN_IES_SMT_SPEC(133, 134, 0x910, 8) - }; - --static int spec_ies_smt_set(struct regmap *regmap, unsigned int pin, -- unsigned char align, int value) --{ -- unsigned int i, reg_addr, bit; -- bool find = false; -+static const struct mtk_pin_ies_smt_set mt8173_ies_set[] = { -+ MTK_PIN_IES_SMT_SPEC(0, 4, 0x900, 1), -+ MTK_PIN_IES_SMT_SPEC(5, 9, 0x900, 2), -+ MTK_PIN_IES_SMT_SPEC(10, 13, 0x900, 10), -+ MTK_PIN_IES_SMT_SPEC(14, 15, 0x910, 10), -+ MTK_PIN_IES_SMT_SPEC(16, 16, 0x900, 0), -+ MTK_PIN_IES_SMT_SPEC(17, 17, 0x920, 2), -+ MTK_PIN_IES_SMT_SPEC(18, 21, 0x910, 3), -+ MTK_PIN_IES_SMT_SPEC(29, 32, 0x900, 3), -+ MTK_PIN_IES_SMT_SPEC(33, 33, 0x900, 4), -+ MTK_PIN_IES_SMT_SPEC(34, 36, 0x900, 5), -+ MTK_PIN_IES_SMT_SPEC(37, 38, 0x900, 6), -+ MTK_PIN_IES_SMT_SPEC(39, 39, 0x900, 7), -+ MTK_PIN_IES_SMT_SPEC(40, 41, 0x900, 9), -+ MTK_PIN_IES_SMT_SPEC(42, 42, 0x910, 0), -+ MTK_PIN_IES_SMT_SPEC(43, 44, 0x900, 11), -+ MTK_PIN_IES_SMT_SPEC(45, 46, 0x900, 12), -+ MTK_PIN_IES_SMT_SPEC(57, 64, 0xc20, 14), -+ MTK_PIN_IES_SMT_SPEC(65, 65, 0xc10, 14), -+ MTK_PIN_IES_SMT_SPEC(66, 66, 0xc00, 14), -+ MTK_PIN_IES_SMT_SPEC(67, 67, 0xd10, 14), -+ MTK_PIN_IES_SMT_SPEC(68, 68, 0xd00, 14), -+ MTK_PIN_IES_SMT_SPEC(69, 72, 0x910, 14), -+ MTK_PIN_IES_SMT_SPEC(73, 76, 0xc60, 14), -+ MTK_PIN_IES_SMT_SPEC(77, 77, 0xc40, 14), -+ MTK_PIN_IES_SMT_SPEC(78, 78, 0xc50, 14), -+ MTK_PIN_IES_SMT_SPEC(79, 82, 0x910, 15), -+ MTK_PIN_IES_SMT_SPEC(83, 83, 0x920, 0), -+ MTK_PIN_IES_SMT_SPEC(84, 85, 0x920, 1), -+ MTK_PIN_IES_SMT_SPEC(86, 91, 0x920, 2), -+ MTK_PIN_IES_SMT_SPEC(92, 92, 0x900, 13), -+ MTK_PIN_IES_SMT_SPEC(93, 95, 0x900, 14), -+ MTK_PIN_IES_SMT_SPEC(96, 99, 0x900, 15), -+ MTK_PIN_IES_SMT_SPEC(100, 103, 0xca0, 14), -+ MTK_PIN_IES_SMT_SPEC(104, 104, 0xc80, 14), -+ MTK_PIN_IES_SMT_SPEC(105, 105, 0xc90, 14), -+ MTK_PIN_IES_SMT_SPEC(106, 107, 0x91, 4), -+ MTK_PIN_IES_SMT_SPEC(108, 112, 0x910, 1), -+ MTK_PIN_IES_SMT_SPEC(113, 116, 0x910, 2), -+ MTK_PIN_IES_SMT_SPEC(117, 118, 0x910, 5), -+ MTK_PIN_IES_SMT_SPEC(119, 124, 0x910, 6), -+ MTK_PIN_IES_SMT_SPEC(125, 126, 0x910, 7), -+ MTK_PIN_IES_SMT_SPEC(127, 127, 0x910, 0), -+ MTK_PIN_IES_SMT_SPEC(128, 128, 0x920, 8), -+ MTK_PIN_IES_SMT_SPEC(129, 130, 0x920, 9), -+ MTK_PIN_IES_SMT_SPEC(131, 132, 0x920, 8), -+ MTK_PIN_IES_SMT_SPEC(133, 134, 0x910, 8) -+}; - -- for (i = 0; i < ARRAY_SIZE(mt8173_ies_smt_set); i++) { -- if (pin >= mt8173_ies_smt_set[i].start && -- pin <= mt8173_ies_smt_set[i].end) { -- find = true; -- break; -- } -- } -- -- if (!find) -- return -EINVAL; -- -- if (value) -- reg_addr = mt8173_ies_smt_set[i].offset + align; -- else -- reg_addr = mt8173_ies_smt_set[i].offset + (align << 1); -- -- bit = BIT(mt8173_ies_smt_set[i].bit); -- regmap_write(regmap, reg_addr, bit); -- return 0; -+static int mt8173_ies_smt_set(struct regmap *regmap, unsigned int pin, -+ unsigned char align, int value, enum pin_config_param arg) -+{ -+ if (arg == PIN_CONFIG_INPUT_ENABLE) -+ return mtk_pconf_spec_set_ies_smt_range(regmap, mt8173_ies_set, -+ ARRAY_SIZE(mt8173_ies_set), pin, align, value); -+ else if (arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE) -+ return mtk_pconf_spec_set_ies_smt_range(regmap, mt8173_smt_set, -+ ARRAY_SIZE(mt8173_smt_set), pin, align, value); -+ return -EINVAL; - } - - static const struct mtk_drv_group_desc mt8173_drv_grp[] = { -@@ -307,7 +320,7 @@ static const struct mtk_pinctrl_devdata - .pin_drv_grp = mt8173_pin_drv, - .n_pin_drv_grps = ARRAY_SIZE(mt8173_pin_drv), - .spec_pull_set = mt8173_spec_pull_set, -- .spec_ies_smt_set = spec_ies_smt_set, -+ .spec_ies_smt_set = mt8173_ies_smt_set, - .dir_offset = 0x0000, - .pullen_offset = 0x0100, - .pullsel_offset = 0x0200, ---- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c -@@ -107,28 +107,38 @@ static void mtk_gpio_set(struct gpio_chi - regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); - } - --static void mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, -- int value, enum pin_config_param param) -+static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, -+ int value, enum pin_config_param arg) - { - unsigned int reg_addr, offset; - unsigned int bit; -- int ret; -+ -+ /** -+ * Due to some soc are not support ies/smt config, add this special -+ * control to handle it. -+ */ -+ if (!pctl->devdata->spec_ies_smt_set && -+ pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT && -+ arg == PIN_CONFIG_INPUT_ENABLE) -+ return -EINVAL; -+ -+ if (!pctl->devdata->spec_ies_smt_set && -+ pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT && -+ arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE) -+ return -EINVAL; - - /* - * Due to some pins are irregular, their input enable and smt -- * control register are discontinuous, but they are mapping together. -- * So we need this special handle. -+ * control register are discontinuous, so we need this special handle. - */ - if (pctl->devdata->spec_ies_smt_set) { -- ret = pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin), -- pin, pctl->devdata->port_align, value); -- if (!ret) -- return; -+ return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin), -+ pin, pctl->devdata->port_align, value, arg); - } - - bit = BIT(pin & 0xf); - -- if (param == PIN_CONFIG_INPUT_ENABLE) -+ if (arg == PIN_CONFIG_INPUT_ENABLE) - offset = pctl->devdata->ies_offset; - else - offset = pctl->devdata->smt_offset; -@@ -139,6 +149,33 @@ static void mtk_pconf_set_ies_smt(struct - reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl); - - regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit); -+ return 0; -+} -+ -+int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap, -+ const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num, -+ unsigned int pin, unsigned char align, int value) -+{ -+ unsigned int i, reg_addr, bit; -+ -+ for (i = 0; i < info_num; i++) { -+ if (pin >= ies_smt_infos[i].start && -+ pin <= ies_smt_infos[i].end) { -+ break; -+ } -+ } -+ -+ if (i == info_num) -+ return -EINVAL; -+ -+ if (value) -+ reg_addr = ies_smt_infos[i].offset + align; -+ else -+ reg_addr = ies_smt_infos[i].offset + (align << 1); -+ -+ bit = BIT(ies_smt_infos[i].bit); -+ regmap_write(regmap, reg_addr, bit); -+ return 0; - } - - static const struct mtk_pin_drv_grp *mtk_find_pin_drv_grp_by_pin( -@@ -295,36 +332,37 @@ static int mtk_pconf_parse_conf(struct p - unsigned int pin, enum pin_config_param param, - enum pin_config_param arg) - { -+ int ret = 0; - struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); - - switch (param) { - case PIN_CONFIG_BIAS_DISABLE: -- mtk_pconf_set_pull_select(pctl, pin, false, false, arg); -+ ret = mtk_pconf_set_pull_select(pctl, pin, false, false, arg); - break; - case PIN_CONFIG_BIAS_PULL_UP: -- mtk_pconf_set_pull_select(pctl, pin, true, true, arg); -+ ret = mtk_pconf_set_pull_select(pctl, pin, true, true, arg); - break; - case PIN_CONFIG_BIAS_PULL_DOWN: -- mtk_pconf_set_pull_select(pctl, pin, true, false, arg); -+ ret = mtk_pconf_set_pull_select(pctl, pin, true, false, arg); - break; - case PIN_CONFIG_INPUT_ENABLE: -- mtk_pconf_set_ies_smt(pctl, pin, arg, param); -+ ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param); - break; - case PIN_CONFIG_OUTPUT: - mtk_gpio_set(pctl->chip, pin, arg); -- mtk_pmx_gpio_set_direction(pctldev, NULL, pin, false); -+ ret = mtk_pmx_gpio_set_direction(pctldev, NULL, pin, false); - break; - case PIN_CONFIG_INPUT_SCHMITT_ENABLE: -- mtk_pconf_set_ies_smt(pctl, pin, arg, param); -+ ret = mtk_pconf_set_ies_smt(pctl, pin, arg, param); - break; - case PIN_CONFIG_DRIVE_STRENGTH: -- mtk_pconf_set_driving(pctl, pin, arg); -+ ret = mtk_pconf_set_driving(pctl, pin, arg); - break; - default: -- return -EINVAL; -+ ret = -EINVAL; - } - -- return 0; -+ return ret; - } - - static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, -@@ -343,12 +381,14 @@ static int mtk_pconf_group_set(struct pi - { - struct mtk_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); - struct mtk_pinctrl_group *g = &pctl->groups[group]; -- int i; -+ int i, ret; - - for (i = 0; i < num_configs; i++) { -- mtk_pconf_parse_conf(pctldev, g->pin, -+ ret = mtk_pconf_parse_conf(pctldev, g->pin, - pinconf_to_config_param(configs[i]), - pinconf_to_config_argument(configs[i])); -+ if (ret < 0) -+ return ret; - - g->config = configs[i]; - } ---- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h -+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h -@@ -17,6 +17,7 @@ - - #include <linux/pinctrl/pinctrl.h> - #include <linux/regmap.h> -+#include <linux/pinctrl/pinconf-generic.h> - - #define NO_EINT_SUPPORT 255 - #define MT_EDGE_SENSITIVE 0 -@@ -25,6 +26,8 @@ - #define EINT_DBNC_RST_BIT (0x1 << 1) - #define EINT_DBNC_SET_EN (0x1 << 0) - -+#define MTK_PINCTRL_NOT_SUPPORT (0xffff) -+ - struct mtk_desc_function { - const char *name; - unsigned char muxval; -@@ -143,6 +146,28 @@ struct mtk_pin_spec_pupd_set_samereg { - .r0_bit = _r0, \ - } - -+/** -+ * struct mtk_pin_ies_set - For special pins' ies and smt setting. -+ * @start: The start pin number of those special pins. -+ * @end: The end pin number of those special pins. -+ * @offset: The offset of special setting register. -+ * @bit: The bit of special setting register. -+ */ -+struct mtk_pin_ies_smt_set { -+ unsigned short start; -+ unsigned short end; -+ unsigned short offset; -+ unsigned char bit; -+}; -+ -+#define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ -+ { \ -+ .start = _start, \ -+ .end = _end, \ -+ .bit = _bit, \ -+ .offset = _offset, \ -+ } -+ - struct mtk_eint_offsets { - const char *name; - unsigned int stat; -@@ -208,7 +233,7 @@ struct mtk_pinctrl_devdata { - int (*spec_pull_set)(struct regmap *reg, unsigned int pin, - unsigned char align, bool isup, unsigned int arg); - int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin, -- unsigned char align, int value); -+ unsigned char align, int value, enum pin_config_param arg); - unsigned int dir_offset; - unsigned int ies_offset; - unsigned int smt_offset; -@@ -251,4 +276,8 @@ int mtk_pctrl_spec_pull_set_samereg(stru - unsigned int info_num, unsigned int pin, - unsigned char align, bool isup, unsigned int r1r0); - -+int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap, -+ const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num, -+ unsigned int pin, unsigned char align, int value); -+ - #endif /* __PINCTRL_MTK_COMMON_H */ |