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| author | John Crispin <john@openwrt.org> | 2015-02-24 11:59:35 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-02-24 11:59:35 +0000 |
| commit | 1175e83f5050aae6c421b4c8b272deef1a61e7f6 (patch) | |
| tree | 9d34ce034e38327fadde837c3241f64222a21664 /target/linux/mpc85xx/patches-3.19/110-fix_mpc8548_cds.patch | |
| parent | ae9999a76683e3d1670932f494e33c902c6f27d1 (diff) | |
| download | mtk-20170518-1175e83f5050aae6c421b4c8b272deef1a61e7f6.zip mtk-20170518-1175e83f5050aae6c421b4c8b272deef1a61e7f6.tar.gz mtk-20170518-1175e83f5050aae6c421b4c8b272deef1a61e7f6.tar.bz2 | |
mpc85xx: add 3.19 support
It took very little to make the TL-WDR4900 work under 3.19:
- config is the same as for 3.18
- only patch 210 had to be refreshed, the other patches are
the same as for 3.18
- in /etc/config/wireless the path options need to be prefixed
with "platform/" ('platform/ffe09000.pci/...')
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44517
Diffstat (limited to 'target/linux/mpc85xx/patches-3.19/110-fix_mpc8548_cds.patch')
| -rw-r--r-- | target/linux/mpc85xx/patches-3.19/110-fix_mpc8548_cds.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/mpc85xx/patches-3.19/110-fix_mpc8548_cds.patch b/target/linux/mpc85xx/patches-3.19/110-fix_mpc8548_cds.patch new file mode 100644 index 0000000..b6dbd0d --- /dev/null +++ b/target/linux/mpc85xx/patches-3.19/110-fix_mpc8548_cds.patch @@ -0,0 +1,40 @@ +--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi ++++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi +@@ -131,7 +131,24 @@ + + /include/ "pq3-i2c-0.dtsi" + /include/ "pq3-i2c-1.dtsi" +-/include/ "pq3-duart-0.dtsi" ++ ++ serial0: serial@4600 { ++ cell-index = <1>; ++ device_type = "serial"; ++ compatible = "fsl,ns16550", "ns16550"; ++ reg = <0x4600 0x100>; ++ clock-frequency = <0>; ++ interrupts = <42 2 0 0>; ++ }; ++ ++ serial1: serial@4500 { ++ cell-index = <0>; ++ device_type = "serial"; ++ compatible = "fsl,ns16550", "ns16550"; ++ reg = <0x4500 0x100>; ++ clock-frequency = <0>; ++ interrupts = <42 2 0 0>; ++ }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8548-l2-cache-controller"; +--- a/arch/powerpc/boot/dts/mpc8548cds_32b.dts ++++ b/arch/powerpc/boot/dts/mpc8548cds_32b.dts +@@ -75,6 +75,9 @@ + ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; + }; + }; ++ chosen { ++ linux,stdout-path = "/soc8548@e0000000/serial@4600"; ++ }; + }; + + /* |