diff options
author | Felix Fietkau <nbd@openwrt.org> | 2011-01-16 01:24:53 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2011-01-16 01:24:53 +0000 |
commit | d6d301bb14b614537323eed266917b3e3220ea86 (patch) | |
tree | e7207aff927b560de6eb66c4c589958f1a21c8d7 /target/linux/mpc85xx/patches | |
parent | 6cf6302a784f3761d8abfe7d207b2ec998fd88ff (diff) | |
download | mtk-20170518-d6d301bb14b614537323eed266917b3e3220ea86.zip mtk-20170518-d6d301bb14b614537323eed266917b3e3220ea86.tar.gz mtk-20170518-d6d301bb14b614537323eed266917b3e3220ea86.tar.bz2 |
mpc85xx: fix mpc8548 support (reorder serial ports, add default stdout path to device tree), enable pcie
SVN-Revision: 25015
Diffstat (limited to 'target/linux/mpc85xx/patches')
-rw-r--r-- | target/linux/mpc85xx/patches/110-fix_mpc8548_cds.patch | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/mpc85xx/patches/110-fix_mpc8548_cds.patch b/target/linux/mpc85xx/patches/110-fix_mpc8548_cds.patch new file mode 100644 index 0000000..3cca828 --- /dev/null +++ b/target/linux/mpc85xx/patches/110-fix_mpc8548_cds.patch @@ -0,0 +1,38 @@ +--- a/arch/powerpc/boot/dts/mpc8548cds.dts ++++ b/arch/powerpc/boot/dts/mpc8548cds.dts +@@ -308,21 +308,21 @@ + }; + }; + +- serial0: serial@4500 { +- cell-index = <0>; ++ serial0: serial@4600 { ++ cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; +- reg = <0x4500 0x100>; // reg base, size ++ reg = <0x4600 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + +- serial1: serial@4600 { +- cell-index = <1>; ++ serial1: serial@4500 { ++ cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; +- reg = <0x4600 0x100>; // reg base, size ++ reg = <0x4500 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + interrupts = <42 2>; + interrupt-parent = <&mpic>; +@@ -564,4 +564,7 @@ + 0x0 0x100000>; + }; + }; ++ chosen { ++ linux,stdout-path = "/soc8548@e0000000/serial@4600"; ++ }; + }; |