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author | Florian Fainelli <florian@openwrt.org> | 2013-01-17 22:29:13 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2013-01-17 22:29:13 +0000 |
commit | 7e1e7063c26dccb6f47a00db72612e9f8c57c016 (patch) | |
tree | 21c7b51af4a457d4a7c8af7106a86d26f55f6af3 /target/linux/mvebu/patches-3.8/040-arm_mvebu_add_pcie_axp_db.patch | |
parent | 29c21b973be0ba7a07f0b13ef1198155a1ddc055 (diff) | |
download | mtk-20170518-7e1e7063c26dccb6f47a00db72612e9f8c57c016.zip mtk-20170518-7e1e7063c26dccb6f47a00db72612e9f8c57c016.tar.gz mtk-20170518-7e1e7063c26dccb6f47a00db72612e9f8c57c016.tar.bz2 |
mvebu: add preliminary support for PCI express
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 35211
Diffstat (limited to 'target/linux/mvebu/patches-3.8/040-arm_mvebu_add_pcie_axp_db.patch')
-rw-r--r-- | target/linux/mvebu/patches-3.8/040-arm_mvebu_add_pcie_axp_db.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.8/040-arm_mvebu_add_pcie_axp_db.patch b/target/linux/mvebu/patches-3.8/040-arm_mvebu_add_pcie_axp_db.patch new file mode 100644 index 0000000..af15d4b --- /dev/null +++ b/target/linux/mvebu/patches-3.8/040-arm_mvebu_add_pcie_axp_db.patch @@ -0,0 +1,44 @@ +The Marvell evaluation board (DB) for the Armada XP SoC has 6 +physicals full-size PCIe slots, so we enable the corresponding PCIe +interfaces in the Device Tree. + +Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> +--- + arch/arm/boot/dts/armada-xp-db.dts | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +--- a/arch/arm/boot/dts/armada-xp-db.dts ++++ b/arch/arm/boot/dts/armada-xp-db.dts +@@ -109,5 +109,32 @@ + usb@d0052000 { + status = "okay"; + }; ++ ++ pcie-controller { ++ status = "okay"; ++ ++ /* ++ * All 6 slots are physically present as ++ * standard PCIe slots on the board. ++ */ ++ pcie0.0@0xd0040000 { ++ status = "okay"; ++ }; ++ pcie0.1@0xd0044000 { ++ status = "okay"; ++ }; ++ pcie0.2@0xd0048000 { ++ status = "okay"; ++ }; ++ pcie0.3@0xd004C000 { ++ status = "okay"; ++ }; ++ pcie2@0xd0042000 { ++ status = "okay"; ++ }; ++ pcie3@0xd0082000 { ++ status = "okay"; ++ }; ++ }; + }; + }; |