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author | John Crispin <john@openwrt.org> | 2016-02-15 18:45:22 +0000 |
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committer | John Crispin <john@openwrt.org> | 2016-02-15 18:45:22 +0000 |
commit | 8b38a9450bd0e07306641d9250e1565f5804351b (patch) | |
tree | 1bf3e527edbc9ab276a30bf6d46a17e5c34610b7 /target/linux/ramips/dts/PSG1208.dts | |
parent | f60cc5df9cd10731f883417358f445ad70346ad9 (diff) | |
download | mtk-20170518-8b38a9450bd0e07306641d9250e1565f5804351b.zip mtk-20170518-8b38a9450bd0e07306641d9250e1565f5804351b.tar.gz mtk-20170518-8b38a9450bd0e07306641d9250e1565f5804351b.tar.bz2 |
ramips: Add support for Phicomm PSG1208
This patch adds support for Phicomm PSG1208.This is a router with MT7620A SoC with 8M flash and 64M ram.
The WPS led is uesd as status_led because the power light can't be controlled with GPIO.
It seems that the 5g wifi led is connected to MT7612E and it can't be controlled with GPIO too.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
SVN-Revision: 48721
Diffstat (limited to 'target/linux/ramips/dts/PSG1208.dts')
-rw-r--r-- | target/linux/ramips/dts/PSG1208.dts | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/PSG1208.dts b/target/linux/ramips/dts/PSG1208.dts new file mode 100644 index 0000000..c3be8ef --- /dev/null +++ b/target/linux/ramips/dts/PSG1208.dts @@ -0,0 +1,114 @@ +/dts-v1/; + +/include/ "mt7620a.dtsi" + +/ { + compatible = "PSG1208", "ralink,mt7620a-soc"; + model = "Phicomm PSG1208"; + + palmbus@10000000 { + gpio1: gpio@638 { + status = "okay"; + }; + + gpio3: gpio@688 { + status = "okay"; + }; + + spi@b00 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0 0>; + linux,modalias = "m25p80", "en25q64"; + spi-max-frequency = <10000000>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@20000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@30000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@40000 { + label = "firmware"; + reg = <0x50000 0x7b0000>; + }; + }; + }; + }; + + pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd"; + ralink,function = "gpio"; + }; + }; + }; + + ethernet@10100000 { + pinctrl-names = "default"; + pinctrl-0 = <&ephy_pins>; + mtd-mac-address = <&factory 0x4>; + mediatek,portmap = "llllw"; + }; + + pcie@10140000 { + status = "okay"; + + pcie-bridge { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + device_type = "pci"; + mediatek,mtd-eeprom = <&factory 0x8000>; + mediatek,2ghz = <0>; + }; + }; + }; + + wmac@10180000 { + ralink,mtd-eeprom = <&factory 0>; + }; + + gpio-leds { + compatible = "gpio-leds"; + + wan { + label = "psg1208:white:wps"; + gpios = <&gpio1 15 1>; + }; + + wlan { + label = "psg1208:white:wlan2g"; + gpios = <&gpio3 0 1>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + + reset { + label = "reset"; + gpios = <&gpio0 1 1>; + linux,code = <0x198>; + }; + }; +}; |