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authorStanislav Galabov <stanislav_galabov@smartcom.bg>2016-05-10 13:41:46 +0300
committerJohn Crispin <john@phrozen.org>2016-05-12 03:29:35 +0200
commit9195d8da355d0d141ac02c9a5269452dc64ffd2d (patch)
tree6983c73be89b47cc24300c4771618d01fa4ba901 /target/linux/ramips/dts/WL-351.dts
parent861266c9ec0d5a48af044a08a01ccb9fc62b1ac8 (diff)
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ramips: DTS rework
Add node aliases to dtsi files. Reword dts files so they're more in-line with upstream. Fix some more warnings and errors reported by dtc Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
Diffstat (limited to 'target/linux/ramips/dts/WL-351.dts')
-rw-r--r--target/linux/ramips/dts/WL-351.dts66
1 files changed, 33 insertions, 33 deletions
diff --git a/target/linux/ramips/dts/WL-351.dts b/target/linux/ramips/dts/WL-351.dts
index 605c73b..ecda696 100644
--- a/target/linux/ramips/dts/WL-351.dts
+++ b/target/linux/ramips/dts/WL-351.dts
@@ -6,15 +6,6 @@
compatible = "WL-351", "ralink,rt3052-soc";
model = "Sitecom WL-351 v1 002";
- pinctrl {
- state_default: pinctrl0 {
- gpio {
- ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
- ralink,function = "gpio";
- };
- };
- };
-
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x800000>;
@@ -47,30 +38,6 @@
};
};
- ethernet@10100000 {
- mtd-mac-address = <&factory 0x4>;
- };
-
- esw@10110000 {
- mediatek,portmap = <0x3f>;
- ralink,fct2 = <0x0002500c>;
- /*
- * ext phy base addr 31, rx/tx clock skew 0,
- * turbo mii off, rgmi 3.3v off, port 5 polling off
- * port5: enabled, gige, full-duplex, rx/tx-flow-control
- * port6: enabled, gige, full-duplex, rx/tx-flow-control
- */
- ralink,fpa2 = <0x1f003fff>;
- };
-
- wmac@10180000 {
- ralink,mtd-eeprom = <&factory 0>;
- };
-
- otg@101c0000 {
- status = "okay";
- };
-
gpio-leds {
compatible = "gpio-leds";
@@ -115,3 +82,36 @@
gpio-sck = <&gpio0 2 0>;
};
};
+
+&pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
+ ralink,function = "gpio";
+ };
+ };
+};
+
+&ethernet {
+ mtd-mac-address = <&factory 0x4>;
+};
+
+&esw {
+ mediatek,portmap = <0x3f>;
+ ralink,fct2 = <0x0002500c>;
+ /*
+ * ext phy base addr 31, rx/tx clock skew 0,
+ * turbo mii off, rgmi 3.3v off, port 5 polling off
+ * port5: enabled, gige, full-duplex, rx/tx-flow-control
+ * port6: enabled, gige, full-duplex, rx/tx-flow-control
+ */
+ ralink,fpa2 = <0x1f003fff>;
+};
+
+&wmac {
+ ralink,mtd-eeprom = <&factory 0>;
+};
+
+&otg {
+ status = "okay";
+};