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| author | John Crispin <john@openwrt.org> | 2013-07-14 18:00:34 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2013-07-14 18:00:34 +0000 |
| commit | 89c03927368852cf912e76d553bcc7671f6c16cd (patch) | |
| tree | c396a709343fe323501f82c078fc93d435701e9b /target/linux/ramips/patches-3.8/0049-MIPS-ralink-add-verbose-pmu-info.patch | |
| parent | eb0a44917eea1b2d673d26c28df5aecbb8d77d67 (diff) | |
| download | mtk-20170518-89c03927368852cf912e76d553bcc7671f6c16cd.zip mtk-20170518-89c03927368852cf912e76d553bcc7671f6c16cd.tar.gz mtk-20170518-89c03927368852cf912e76d553bcc7671f6c16cd.tar.bz2 | |
ralink: drop v3.8 support
Signed-off-by: John Crispin <blogic@opewnrt.org>
SVN-Revision: 37311
Diffstat (limited to 'target/linux/ramips/patches-3.8/0049-MIPS-ralink-add-verbose-pmu-info.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.8/0049-MIPS-ralink-add-verbose-pmu-info.patch | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/target/linux/ramips/patches-3.8/0049-MIPS-ralink-add-verbose-pmu-info.patch b/target/linux/ramips/patches-3.8/0049-MIPS-ralink-add-verbose-pmu-info.patch deleted file mode 100644 index 206e9d8..0000000 --- a/target/linux/ramips/patches-3.8/0049-MIPS-ralink-add-verbose-pmu-info.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 1652cf71db797b249c0d384e6c3d31b312b7012e Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Mon, 20 May 2013 20:57:09 +0200 -Subject: [PATCH 49/79] MIPS: ralink: add verbose pmu info - -Print the PMU and LDO settings on boot. - -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - arch/mips/ralink/mt7620.c | 26 ++++++++++++++++++++++++++ - 1 file changed, 26 insertions(+) - -diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c -index 28350d0..69729a5 100644 ---- a/arch/mips/ralink/mt7620.c -+++ b/arch/mips/ralink/mt7620.c -@@ -20,6 +20,22 @@ - - #include "common.h" - -+/* analog */ -+#define PMU0_CFG 0x88 -+#define PMU_SW_SET BIT(28) -+#define A_DCDC_EN BIT(24) -+#define A_SSC_PERI BIT(19) -+#define A_SSC_GEN BIT(18) -+#define A_SSC_M 0x3 -+#define A_SSC_S 16 -+#define A_DLY_M 0x7 -+#define A_DLY_S 8 -+#define A_VTUNE_M 0xff -+ -+/* digital */ -+#define PMU1_CFG 0x8C -+#define DIG_SW_SEL BIT(25) -+ - /* does the board have sdram or ddram */ - static int dram_type; - -@@ -187,6 +203,8 @@ void prom_soc_init(struct ralink_soc_info *soc_info) - u32 n1; - u32 rev; - u32 cfg0; -+ u32 pmu0; -+ u32 pmu1; - - n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); - n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); -@@ -234,4 +252,12 @@ void prom_soc_init(struct ralink_soc_info *soc_info) - BUG(); - } - soc_info->mem_base = MT7620_DRAM_BASE; -+ -+ pmu0 = __raw_readl(sysc + PMU0_CFG); -+ pmu1 = __raw_readl(sysc + PMU1_CFG); -+ -+ pr_info("Analog PMU set to %s control\n", -+ (pmu0 & PMU_SW_SET) ? ("sw") : ("hw")); -+ pr_info("Digital PMU set to %s control\n", -+ (pmu1 & DIG_SW_SEL) ? ("sw") : ("hw")); - } --- -1.7.10.4 - |