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| author | John Crispin <john@openwrt.org> | 2013-12-25 17:04:34 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2013-12-25 17:04:34 +0000 |
| commit | 93d8dc870ee07027ca1e27f19831d6127402336f (patch) | |
| tree | f484917f3364d56fa772e84a7672eebece39105b /target/linux/ramips | |
| parent | 05f8604e2eca452eea672c78031f58cdc37e40ef (diff) | |
| download | mtk-20170518-93d8dc870ee07027ca1e27f19831d6127402336f.zip mtk-20170518-93d8dc870ee07027ca1e27f19831d6127402336f.tar.gz mtk-20170518-93d8dc870ee07027ca1e27f19831d6127402336f.tar.bz2 | |
ramips: add gpio pin 72 in mt7620 chips to dtsi files
describes register set to control last gpio pin on mt7620 platfrom
Signed-off-by: Pavel Löbl <lobl.pavel@gmail.com>
SVN-Revision: 39162
Diffstat (limited to 'target/linux/ramips')
| -rw-r--r-- | target/linux/ramips/dts/mt7620a.dtsi | 19 | ||||
| -rw-r--r-- | target/linux/ramips/dts/mt7620n.dtsi | 19 |
2 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi index a044725..3e735fb 100644 --- a/target/linux/ramips/dts/mt7620a.dtsi +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -150,6 +150,25 @@ status = "disabled"; }; + gpio3: gpio@688 { + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; + reg = <0x688 0x24>; + + interrupt-parent = <&intc>; + interrupts = <6>; + + gpio-controller; + #gpio-cells = <2>; + + ralink,gpio-base = <72>; + ralink,num-gpios = <1>; + ralink,register-map = [ 00 04 08 0c + 10 14 18 1c + 20 24 ]; + + status = "disabled"; + }; + i2c@900 { compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c"; reg = <0x900 0x100>; diff --git a/target/linux/ramips/dts/mt7620n.dtsi b/target/linux/ramips/dts/mt7620n.dtsi index e009105..1dedea5 100644 --- a/target/linux/ramips/dts/mt7620n.dtsi +++ b/target/linux/ramips/dts/mt7620n.dtsi @@ -135,6 +135,25 @@ status = "disabled"; }; + gpio3: gpio@688 { + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio"; + reg = <0x688 0x24>; + + interrupt-parent = <&intc>; + interrupts = <6>; + + gpio-controller; + #gpio-cells = <2>; + + ralink,gpio-base = <72>; + ralink,num-gpios = <1>; + ralink,register-map = [ 00 04 08 0c + 10 14 18 1c + 20 24 ]; + + status = "disabled"; + }; + spi@b00 { compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi"; reg = <0xb00 0x100>; |