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authorLars-Peter Clausen <lars@metafoo.de>2010-04-11 16:24:06 +0000
committerLars-Peter Clausen <lars@metafoo.de>2010-04-11 16:24:06 +0000
commitd1031cd8610e12842b551431e694c7bceebbab6c (patch)
tree6c7a16b03454bb7611606f223cb713424295e378 /target/linux/xburst/files-2.6.32/arch
parent15e8d2e0b7e28d0a1ae8ffc848ca5b35e82362de (diff)
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time.c: Timer enable registers are only 8bit width.
SVN-Revision: 20796
Diffstat (limited to 'target/linux/xburst/files-2.6.32/arch')
-rw-r--r--target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
index d9c5eba..77fc201 100644
--- a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
+++ b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
@@ -98,12 +98,12 @@ static void jz4740_init_timer(void)
static void jz4740_timer_enable(unsigned int timer)
{
writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
- writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
+ writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
}
static void jz4740_timer_disable(unsigned int timer)
{
- writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
+ writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
}