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author | Jonas Gorski <jogo@openwrt.org> | 2012-04-09 14:48:51 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2012-04-09 14:48:51 +0000 |
commit | 16b4cbcdd64d92f6e79d41e11eda25a178ef3b53 (patch) | |
tree | bd75cb94a45491fc7adfc7874a0f794afe565cbc /target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch | |
parent | 1a57b05f472e60b05a8a4360718253820e8fece4 (diff) | |
download | mtk-20170518-16b4cbcdd64d92f6e79d41e11eda25a178ef3b53.zip mtk-20170518-16b4cbcdd64d92f6e79d41e11eda25a178ef3b53.tar.gz mtk-20170518-16b4cbcdd64d92f6e79d41e11eda25a178ef3b53.tar.bz2 |
kernel: update linux 3.2 to 3.2.14
SVN-Revision: 31222
Diffstat (limited to 'target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch')
-rw-r--r-- | target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch b/target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch index 6a49e35..b4e4843 100644 --- a/target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch +++ b/target/linux/xburst/patches-3.2/0014-MIPS-JZ4740-reset-Initialize-hibernate-wakeup-counte.patch @@ -17,8 +17,6 @@ the Dingoo A320 kernel. arch/mips/jz4740/reset.c | 46 ++++++++++++++++++++++++++++++++++++++++------ 1 files changed, 40 insertions(+), 6 deletions(-) -diff --git a/arch/mips/jz4740/reset.c b/arch/mips/jz4740/reset.c -index 5f1fb95..e6d1d7b 100644 --- a/arch/mips/jz4740/reset.c +++ b/arch/mips/jz4740/reset.c @@ -21,6 +21,9 @@ @@ -31,18 +29,19 @@ index 5f1fb95..e6d1d7b 100644 static void jz4740_halt(void) { while (1) { -@@ -53,21 +56,52 @@ static void jz4740_restart(char *command) +@@ -53,21 +56,52 @@ static void jz4740_restart(char *command jz4740_halt(); } -#define JZ_REG_RTC_CTRL 0x00 -#define JZ_REG_RTC_HIBERNATE 0x20 +- +-#define JZ_RTC_CTRL_WRDY BIT(7) +#define JZ_REG_RTC_CTRL 0x00 +#define JZ_REG_RTC_HIBERNATE 0x20 +#define JZ_REG_RTC_WAKEUP_FILTER 0x24 +#define JZ_REG_RTC_RESET_COUNTER 0x28 - --#define JZ_RTC_CTRL_WRDY BIT(7) ++ +#define JZ_RTC_CTRL_WRDY BIT(7) +#define JZ_RTC_WAKEUP_FILTER_MASK 0x0000FFE0 +#define JZ_RTC_RESET_COUNTER_MASK 0x00000FE0 @@ -90,6 +89,3 @@ index 5f1fb95..e6d1d7b 100644 jz4740_halt(); } --- -1.7.5.4 - |