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| author | Gabor Juhos <juhosg@openwrt.org> | 2007-06-23 05:30:31 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2007-06-23 05:30:31 +0000 |
| commit | 0b1fdf1ad8f3c6f0fc59ecf63b18d62d9b032ed8 (patch) | |
| tree | 016020b83eab9d5ea5c2a7d5b3e6650184f98883 /target/linux | |
| parent | 2e3c3918f2d81a8a4af30ecb44454ae326c8d7bd (diff) | |
| download | mtk-20170518-0b1fdf1ad8f3c6f0fc59ecf63b18d62d9b032ed8.zip mtk-20170518-0b1fdf1ad8f3c6f0fc59ecf63b18d62d9b032ed8.tar.gz mtk-20170518-0b1fdf1ad8f3c6f0fc59ecf63b18d62d9b032ed8.tar.bz2 | |
fix hardware byte swapping to work in little endian mode as well
SVN-Revision: 7712
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c | 4 | ||||
| -rw-r--r-- | target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c b/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c index fea52ff..570244b 100644 --- a/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c +++ b/target/linux/adm5120-2.6/files/arch/mips/adm5120/adm5120_info.c @@ -904,12 +904,12 @@ void __init adm5120_swab_test(void) u32 t1,t2; t1 = 0x1234; - t2 = swab16(t1); + t2 = __arch__swab16(t1); printk("hardware swab16 test %s, data:0x%04X, result:0x%04X\n", (t2 == 0x3412) ? "passed" :"failed", t1, t2); t1 = 0x12345678; - t2 = swab32(t1); + t2 = __arch__swab32(t1); printk("hardware swab32 test %s, data:0x%08X, result:0x%08X\n", (t2 == 0x78563412) ? "passed" :"failed", t1, t2); diff --git a/target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch b/target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch index a71dba2..6b0fe55 100644 --- a/target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch +++ b/target/linux/adm5120-2.6/patches/008-adm5120_hardware_swab.patch @@ -9,7 +9,7 @@ +static __inline__ __attribute_const__ __u16 ___adm5120__swab16(__u16 x) +{ + __asm__ ( -+ " sw %2, 0xC8(%1) \n" ++ " sh %2, 0xCA(%1) \n" + " lhu %0, 0xCC(%1) \n" + : "=r" (x) + : "r" (0xB2000000), "r" (x)); |