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authorGabor Juhos <juhosg@openwrt.org>2008-05-12 11:56:21 +0000
committerGabor Juhos <juhosg@openwrt.org>2008-05-12 11:56:21 +0000
commit936b0e3cc7a48627953906b3f170f78cf8716c13 (patch)
tree08557e327f8f66b4772eeca297f3b355cd9e60bb /target
parent994094850e8c9a3b3cf1ed341c299dfdd5f48e83 (diff)
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use the righ value in the DSP clock calculation
SVN-Revision: 11123
Diffstat (limited to 'target')
-rw-r--r--target/linux/ar7/files/arch/mips/ar7/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ar7/files/arch/mips/ar7/clock.c b/target/linux/ar7/files/arch/mips/ar7/clock.c
index ff4b581..25e6b73 100644
--- a/target/linux/ar7/files/arch/mips/ar7/clock.c
+++ b/target/linux/ar7/files/arch/mips/ar7/clock.c
@@ -437,7 +437,7 @@ static void __init tnetd7200_init_clocks(void)
printk(KERN_INFO "Clocks: Sync 1:1 mode\n");
printk(KERN_INFO "Clocks: Setting DSP clock\n");
- calculate(dsp_base, TNETD7200_DEF_CPU_CLK, &dsp_prediv,
+ calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
&dsp_postdiv, &dsp_mul);
ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul)
/ dsp_postdiv;