brcm63xx: add support for chip variants

Some SoCs have variants which are mostly the same, but use a different
chip id (or not). Add code for detecting them and handling them as
their standard counterparts.

This adds support for e.g. BCM6369.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 39269

8 files changed, 258 insertions, 4 deletions

diff --git a/target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch b/target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
new file mode 100644
index 0000000..2cf02f6
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch
@@ -0,0 +1,77 @@
+From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:08:36 +0100
+Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
+ 2 files changed, 28 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
+ u16 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+ 
++static u32 bcm63xx_cpu_variant __read_mostly;
++
+ static u8 bcm63xx_cpu_rev;
+ static unsigned int bcm63xx_cpu_freq;
+ static unsigned int bcm63xx_memory_size;
+@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
+ 
+ };
+ 
++u32 bcm63xx_get_cpu_variant(void)
++{
++	return bcm63xx_cpu_variant;
++}
++
++EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
++
+ u8 bcm63xx_get_cpu_rev(void)
+ {
+ 	return bcm63xx_cpu_rev;
+@@ -332,6 +341,7 @@ void __init bcm63xx_cpu_init(void)
+ 	/* read out CPU type */
+ 	tmp = bcm_readl(chipid_reg);
+ 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+ 
+ 	switch (bcm63xx_cpu_id) {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -19,6 +19,7 @@
+ #define BCM6368_CPU_ID		0x6368
+ 
+ void __init bcm63xx_cpu_init(void);
++u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+ 
+@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
+ 
++#define BCMCPU_VARIANT_IS_3368() \
++	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6328() \
++	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_6338() \
++	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
++#define BCMCPU_VARIANT_IS_6345() \
++	(bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
++#define BCMCPU_VARIANT_IS_6348() \
++	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
++#define BCMCPU_VARIANT_IS_6358() \
++	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6362() \
++	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
++#define BCMCPU_VARIANT_IS_6368() \
++	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
+  * address of these sets do change.
diff --git a/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch
new file mode 100644
index 0000000..0ffc5bd
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch
@@ -0,0 +1,20 @@
+From 9cd8b4a2ee9d0e6a5b91845bdd6f4b7e114fc8c4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:22:41 +0100
+Subject: [PATCH 41/53] MIPS: BCM63XX: define variant id field
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -9,6 +9,8 @@
+ #define PERF_REV_REG			0x0
+ #define REV_CHIPID_SHIFT		16
+ #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
++#define REV_VARID_SHIFT			8
++#define REV_VARID_MASK			(0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT			0
+ #define REV_REVID_MASK			(0xff << REV_REVID_SHIFT)
+ 
diff --git a/target/linux/brcm63xx/patches-3.10/332-MIPS-BCM63XX-detect-bcm6328-variants.patch b/target/linux/brcm63xx/patches-3.10/332-MIPS-BCM63XX-detect-bcm6328-variants.patch
new file mode 100644
index 0000000..9962b1e
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.10/332-MIPS-BCM63XX-detect-bcm6328-variants.patch
@@ -0,0 +1,67 @@
+From 6c8d94aaf5e2f0a3327e4f69ccd980bd5617f925 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:30:59 +0100
+Subject: [PATCH 42/53] MIPS: BCM63XX: detect bcm6328 variants
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h |  8 ++++++--
+ 2 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -304,6 +304,7 @@ void __init bcm63xx_cpu_init(void)
+ 	struct cpuinfo_mips *c = &current_cpu_data;
+ 	unsigned int cpu = smp_processor_id();
+ 	u32 chipid_reg;
++	u8 varid;
+ 
+ 	/* soc registers location depends on cpu type */
+ 	chipid_reg = 0;
+@@ -343,6 +344,7 @@ void __init bcm63xx_cpu_init(void)
+ 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+ 	bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
++	varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
+ 
+ 	switch (bcm63xx_cpu_id) {
+ 	case BCM3368_CPU_ID:
+@@ -352,6 +354,14 @@ void __init bcm63xx_cpu_init(void)
+ 	case BCM6328_CPU_ID:
+ 		bcm63xx_regs_base = bcm6328_regs_base;
+ 		bcm63xx_irqs = bcm6328_irqs;
++
++		if (varid == 1)
++			bcm63xx_cpu_variant = BCM63281_CPU_ID;
++		else if (varid == 3)
++			bcm63xx_cpu_variant = BCM63283_CPU_ID;
++		else
++			pr_warn("unknown BCM6328 variant: %x\n", varid);
++
+ 		break;
+ 	case BCM6338_CPU_ID:
+ 		bcm63xx_regs_base = bcm6338_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -11,6 +11,8 @@
+  */
+ #define BCM3368_CPU_ID		0x3368
+ #define BCM6328_CPU_ID		0x6328
++#define BCM63281_CPU_ID		0x63281
++#define BCM63283_CPU_ID		0x63283
+ #define BCM6338_CPU_ID		0x6338
+ #define BCM6345_CPU_ID		0x6345
+ #define BCM6348_CPU_ID		0x6348
+@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
+ 
+ #define BCMCPU_VARIANT_IS_3368() \
+ 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+-#define BCMCPU_VARIANT_IS_6328() \
+-	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_63281() \
++	(bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
++#define BCMCPU_VARIANT_IS_63283() \
++	(bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6338() \
+ 	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6345() \
diff --git a/target/linux/brcm63xx/patches-3.10/333-MIPS-BCM63XX-detect-BCM6362-variants.patch b/target/linux/brcm63xx/patches-3.10/333-MIPS-BCM63XX-detect-BCM6362-variants.patch
new file mode 100644
index 0000000..145d18f
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.10/333-MIPS-BCM63XX-detect-BCM6362-variants.patch
@@ -0,0 +1,46 @@
+From dc48adb13a99086d1f484d3379a918626c5b1658 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:33:28 +0100
+Subject: [PATCH 43/53] MIPS: BCM63XX: detect BCM6362 variants
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 8 ++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 11 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -382,6 +382,14 @@ void __init bcm63xx_cpu_init(void)
+ 	case BCM6362_CPU_ID:
+ 		bcm63xx_regs_base = bcm6362_regs_base;
+ 		bcm63xx_irqs = bcm6362_irqs;
++
++		if (varid == 1)
++			bcm63xx_cpu_variant = BCM6362_CPU_ID;
++		else if (varid == 2)
++			bcm63xx_cpu_variant = BCM6361_CPU_ID;
++		else
++			pr_warn("unknown BCM6362 variant: %x\n", varid);
++
+ 		break;
+ 	case BCM6368_CPU_ID:
+ 		bcm63xx_regs_base = bcm6368_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -17,6 +17,7 @@
+ #define BCM6345_CPU_ID		0x6345
+ #define BCM6348_CPU_ID		0x6348
+ #define BCM6358_CPU_ID		0x6358
++#define BCM6361_CPU_ID		0x6361
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
+ 
+@@ -99,6 +100,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6358() \
+ 	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6361() \
++	(bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6362() \
+ 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
diff --git a/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch b/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch
new file mode 100644
index 0000000..19539cf
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-add-support-for-BCM6368-variants.patch
@@ -0,0 +1,44 @@
+From 311b0246d51e09d13464e76abb0e231c855dd333 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:36:56 +0100
+Subject: [PATCH 44/53] MIPS: BCM63XX: add support for BCM6368 variants
+
+---
+ arch/mips/bcm63xx/cpu.c                          | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -392,8 +392,12 @@ void __init bcm63xx_cpu_init(void)
+ 
+ 		break;
+ 	case BCM6368_CPU_ID:
++	case BCM6369_CPU_ID:
+ 		bcm63xx_regs_base = bcm6368_regs_base;
+ 		bcm63xx_irqs = bcm6368_irqs;
++
++		/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
++		bcm63xx_cpu_id = BCM6368_CPU_ID;
+ 		break;
+ 	default:
+ 		panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -20,6 +20,7 @@
+ #define BCM6361_CPU_ID		0x6361
+ #define BCM6362_CPU_ID		0x6362
+ #define BCM6368_CPU_ID		0x6368
++#define BCM6369_CPU_ID		0x6369
+ 
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
+ 	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6369() \
++	(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+ 
+ /*
+  * While registers sets are (mostly) the same across 63xx CPU, base
diff --git a/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch b/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch
index 3c4545d..b40eaff 100644
--- a/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch
+++ b/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch
@@ -11,7 +11,7 @@
  	bcm_gpio_writel(val, GPIO_MODE_REG);
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -621,6 +621,8 @@
+@@ -623,6 +623,8 @@
  #define GPIO_MODE_6358_EXTRA_SPI_SS	(1 << 7)
  #define GPIO_MODE_6358_SERIAL_LED	(1 << 10)
  #define GPIO_MODE_6358_UTOPIA		(1 << 12)
diff --git a/target/linux/brcm63xx/patches-3.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-3.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
index 1258d0c..4a3ee4c 100644
--- a/target/linux/brcm63xx/patches-3.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
+++ b/target/linux/brcm63xx/patches-3.10/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
@@ -10,7 +10,7 @@ Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
 
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -931,6 +931,19 @@
+@@ -933,6 +933,19 @@
  #define ENETSW_PORTOV_FDX_MASK		(1 << 1)
  #define ENETSW_PORTOV_LINKUP_MASK	(1 << 0)
  
diff --git a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
index 516becd..cdaae99 100644
--- a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
+++ b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
@@ -87,7 +87,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  		return -ENODEV;
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -672,6 +672,7 @@
+@@ -674,6 +674,7 @@
  #define GPIO_STRAPBUS_REG		0x40
  #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
  #define STRAPBUS_6358_BOOT_SEL_SERIAL	(0 << 1)
@@ -95,7 +95,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  #define STRAPBUS_6368_BOOT_SEL_MASK	0x3
  #define STRAPBUS_6368_BOOT_SEL_NAND	0
  #define STRAPBUS_6368_BOOT_SEL_SERIAL	1
-@@ -1513,6 +1514,7 @@
+@@ -1515,6 +1516,7 @@
  #define STRAPBUS_6362_BOOT_SEL_NAND	(0 << 15)
  
  #define MISC_STRAPBUS_6328_REG		0x240