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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2013-10-07 00:00:10 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2013-10-07 00:00:10 +0000 |
| commit | 2402f8a9ee919020827f3a303480f18d3ed416b6 (patch) | |
| tree | f36a94a42276f422b27c737c92ec55bea30df947 /target | |
| parent | 4c193a30ce2f925a67ea90a0ceefeddea50d54e4 (diff) | |
| download | mtk-20170518-2402f8a9ee919020827f3a303480f18d3ed416b6.zip mtk-20170518-2402f8a9ee919020827f3a303480f18d3ed416b6.tar.gz mtk-20170518-2402f8a9ee919020827f3a303480f18d3ed416b6.tar.bz2 | |
brcm47xx: move clock detection patches
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 38311
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/brcm47xx/patches-3.10/090-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch (renamed from target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch) | 16 | ||||
| -rw-r--r-- | target/linux/brcm47xx/patches-3.10/091-MIPS-BCM47XX-fix-detected-clock-on-Asus-WL520GC-and-.patch (renamed from target/linux/brcm47xx/patches-3.10/521-MIPS-BCM47XX-fix-detected-clock-on-Asus-WL520GC-and-.patch) | 15 |
2 files changed, 31 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch b/target/linux/brcm47xx/patches-3.10/090-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch index 346e335..ec59534 100644 --- a/target/linux/brcm47xx/patches-3.10/520-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch +++ b/target/linux/brcm47xx/patches-3.10/090-MIPS-BCM47XX-fix-clock-detection-for-BCM5354-with-20.patch @@ -1,3 +1,19 @@ +commit 0388a0410d590a6c239c1cfaa7d49bffd4ed1101 +Author: Hauke Mehrtens <hauke@hauke-m.de> +Date: Wed Sep 18 13:32:59 2013 +0200 + + MIPS: BCM47XX: Fix clock detection for BCM5354 with 200MHz clock + + Some BCM5354 SoCs are running at 200MHz, but it is not possible to read + the clock from a register like it is done on some other SoC in ssb and + bcma. These devices should have a clkfreq nvram configuration value set + to 200, read it and set the clock to the correct value. + + Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + Cc: linux-mips@linux-mips.org + Patchwork: https://patchwork.linux-mips.org/patch/5842/ + Signed-off-by: Ralf Baechle <ralf@linux-mips.org> + --- a/arch/mips/bcm47xx/time.c +++ b/arch/mips/bcm47xx/time.c @@ -27,10 +27,14 @@ diff --git a/target/linux/brcm47xx/patches-3.10/521-MIPS-BCM47XX-fix-detected-clock-on-Asus-WL520GC-and-.patch b/target/linux/brcm47xx/patches-3.10/091-MIPS-BCM47XX-fix-detected-clock-on-Asus-WL520GC-and-.patch index c4eb835..460c0e4 100644 --- a/target/linux/brcm47xx/patches-3.10/521-MIPS-BCM47XX-fix-detected-clock-on-Asus-WL520GC-and-.patch +++ b/target/linux/brcm47xx/patches-3.10/091-MIPS-BCM47XX-fix-detected-clock-on-Asus-WL520GC-and-.patch @@ -1,3 +1,18 @@ +commit 935e93fcc022ff7be7046d2435ce6441e260abfb +Author: Hauke Mehrtens <hauke@hauke-m.de> +Date: Wed Sep 18 13:33:00 2013 +0200 + + MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU + + The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at + 200MHz, but they do not have a clkfreq nvram variable set to the + correct value. This adds a workaround for these devices. + + Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> + Cc: linux-mips@linux-mips.org + Patchwork: https://patchwork.linux-mips.org/patch/5843/ + Signed-off-by: Ralf Baechle <ralf@linux-mips.org> + --- a/arch/mips/bcm47xx/time.c +++ b/arch/mips/bcm47xx/time.c @@ -28,6 +28,7 @@ |