summaryrefslogtreecommitdiff
path: root/target
diff options
context:
space:
mode:
authorFelix Fietkau <nbd@nbd.name>2016-06-14 11:27:20 +0200
committerFelix Fietkau <nbd@nbd.name>2016-06-26 11:21:17 +0200
commit26b8db253745b0591bfffa21f02323428f11a88f (patch)
treedab85a8a94724b8b8677e871b800e8566f78f6ee /target
parent9493613e9443a4f64b7e47a17808cc6f5f66a495 (diff)
downloadmtk-20170518-26b8db253745b0591bfffa21f02323428f11a88f.zip
mtk-20170518-26b8db253745b0591bfffa21f02323428f11a88f.tar.gz
mtk-20170518-26b8db253745b0591bfffa21f02323428f11a88f.tar.bz2
ar71xx: enable flow control for ethernet MACs with built-in switch
Should fix LAN speed issues on some devices. This is an updated version of the previously reverted commit with the same name. It improves the check for MACs connected to a built-in switch Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c6
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h1
-rw-r--r--target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c5
3 files changed, 11 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 17dd3ac..7d641d4 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -907,6 +907,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL;
pdata->switch_data = &ath79_switch_data;
+ pdata->builtin_switch = 1;
ath79_switch_data.phy_poll_mask |= BIT(4);
}
@@ -951,6 +952,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->has_gbit = 1;
pdata->duplex = DUPLEX_FULL;
pdata->switch_data = &ath79_switch_data;
+ pdata->builtin_switch = 1;
ath79_switch_data.phy_poll_mask |= BIT(4);
}
@@ -979,6 +981,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->set_speed = ath79_set_speed_dummy;
pdata->switch_data = &ath79_switch_data;
+ pdata->builtin_switch = 1;
/* reset the built-in switch */
ath79_device_reset_set(AR934X_RESET_ETH_SWITCH);
@@ -1015,6 +1018,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL;
pdata->switch_data = &ath79_switch_data;
+ pdata->builtin_switch = 1;
ath79_switch_data.phy_poll_mask |= BIT(4);
}
@@ -1040,6 +1044,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit = QCA955X_RESET_GE1_MAC |
QCA955X_RESET_GE1_MDIO;
pdata->set_speed = qca955x_set_speed_sgmii;
+ pdata->builtin_switch = 1;
}
pdata->has_gbit = 1;
@@ -1083,6 +1088,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL;
+ pdata->builtin_switch = 1;
/* reset the built-in switch */
ath79_device_reset_set(AR934X_RESET_ETH_SWITCH);
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
index d46dc4e..e494cdf 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
@@ -36,6 +36,7 @@ struct ag71xx_platform_data {
u8 is_ar7240:1;
u8 is_ar724x:1;
u8 has_ar8216:1;
+ u8 builtin_switch:1;
struct ag71xx_switch_platform_data *switch_data;
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index 38226cf..d7c2739 100644
--- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -453,9 +453,12 @@ static void ag71xx_hw_stop(struct ag71xx *ag)
static void ag71xx_hw_setup(struct ag71xx *ag)
{
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
+ u32 init = MAC_CFG1_INIT;
/* setup MAC configuration registers */
- ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
+ if (pdata->builtin_switch)
+ init |= MAC_CFG1_TFC | MAC_CFG1_RFC;
+ ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, init);
ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);