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| author | John Crispin <john@openwrt.org> | 2015-09-16 08:29:31 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-09-16 08:29:31 +0000 |
| commit | 6f07b8a6594f14a5d8d659b4b34fec0484759ae0 (patch) | |
| tree | e2fa8ed4c51635ce6edf24f612cc95758661504e /target | |
| parent | 3dc3275b38c11d1afffe48611e43ba9ed27a3427 (diff) | |
| download | mtk-20170518-6f07b8a6594f14a5d8d659b4b34fec0484759ae0.zip mtk-20170518-6f07b8a6594f14a5d8d659b4b34fec0484759ae0.tar.gz mtk-20170518-6f07b8a6594f14a5d8d659b4b34fec0484759ae0.tar.bz2 | |
ramips: make the early_printk code detect which uart is used
only tested on mt7628
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46950
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ramips/patches-3.18/0015-MIPS-ralink-cleanup-early_printk.patch | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/target/linux/ramips/patches-3.18/0015-MIPS-ralink-cleanup-early_printk.patch b/target/linux/ramips/patches-3.18/0015-MIPS-ralink-cleanup-early_printk.patch index d139139..3fffa80 100644 --- a/target/linux/ramips/patches-3.18/0015-MIPS-ralink-cleanup-early_printk.patch +++ b/target/linux/ramips/patches-3.18/0015-MIPS-ralink-cleanup-early_printk.patch @@ -13,7 +13,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> --- a/arch/mips/ralink/early_printk.c +++ b/arch/mips/ralink/early_printk.c -@@ -12,21 +12,24 @@ +@@ -12,21 +12,26 @@ #include <asm/addrspace.h> #ifdef CONFIG_SOC_RT288X @@ -40,15 +40,17 @@ Signed-off-by: John Crispin <blogic@openwrt.org> +#define MT7628_CHIP_NAME1 0x20203832 + +#define UART_REG_TX 0x04 ++#define UART_REG_LCR 0x0c +#define UART_REG_LSR 0x14 +#define UART_REG_LSR_RT2880 0x1c static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE); +static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE); ++static int init_complete; static inline void uart_w32(u32 val, unsigned reg) { -@@ -38,11 +41,23 @@ static inline u32 uart_r32(unsigned reg) +@@ -38,11 +43,46 @@ return __raw_readl(uart_membase + reg); } @@ -58,6 +60,24 @@ Signed-off-by: John Crispin <blogic@openwrt.org> + (__raw_readl(chipid_membase) == MT7628_CHIP_NAME1); +} + ++static inline void find_uart_base(void) ++{ ++ int i; ++ ++ if (!soc_is_mt7628()) ++ return; ++ ++ for (i = 0; i < 3; i++) { ++ u32 reg = uart_r32(UART_REG_LCR + (0x100 * i)); ++ ++ if (!reg) ++ continue; ++ ++ uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE + (0x100 * i)); ++ break; ++ } ++} ++ void prom_putchar(unsigned char ch) { - while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0) @@ -65,6 +85,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org> - uart_w32(ch, UART_REG_TX); - while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0) - ; ++ if (!init_complete) { ++ find_uart_base(); ++ init_complete = 1; ++ } ++ + if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) { + uart_w32(ch, UART_TX); + while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0) |