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author | Felix Fietkau <nbd@openwrt.org> | 2013-12-08 14:48:30 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2013-12-08 14:48:30 +0000 |
commit | 7a260c3620ec4c89c39c5eb396d64c114d3c3243 (patch) | |
tree | 1cdcbdfd0813c7a53cef58a8a71b169c0de0bbdc /target | |
parent | 1c1d5fac2e9759b50744e09a1f09ab2f9ddab882 (diff) | |
download | mtk-20170518-7a260c3620ec4c89c39c5eb396d64c114d3c3243.zip mtk-20170518-7a260c3620ec4c89c39c5eb396d64c114d3c3243.tar.gz mtk-20170518-7a260c3620ec4c89c39c5eb396d64c114d3c3243.tar.bz2 |
ath9k: merge initval and tx gain table updates, calibration fixes
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 39001
Diffstat (limited to 'target')
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c | 3 | ||||
-rw-r--r-- | target/linux/generic/files/include/linux/ath9k_platform.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c index 03b63c9..a559d73 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c @@ -13,6 +13,7 @@ #include <linux/gpio.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/ath9k_platform.h> #include <asm/mach-ath79/ath79.h> @@ -153,6 +154,8 @@ static void __init wzrhpg450h_init(void) ath79_register_usb(); ap91_pci_init(ee, NULL); + ap9x_pci_get_wmac_data(0)->tx_gain_buffalo = true; + ap9x_pci_get_wmac_data(1)->tx_gain_buffalo = true; ap9x_pci_setup_wmac_led_pin(0, 15); ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio, ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio)); diff --git a/target/linux/generic/files/include/linux/ath9k_platform.h b/target/linux/generic/files/include/linux/ath9k_platform.h index a0b7531..3498780 100644 --- a/target/linux/generic/files/include/linux/ath9k_platform.h +++ b/target/linux/generic/files/include/linux/ath9k_platform.h @@ -33,6 +33,7 @@ struct ath9k_platform_data { bool endian_check; bool is_clk_25mhz; + bool tx_gain_buffalo; bool disable_2ghz; bool disable_5ghz; |