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| author | Mathias Kresin <dev@kresin.me> | 2016-12-21 09:59:29 +0100 |
|---|---|---|
| committer | Mathias Kresin <dev@kresin.me> | 2016-12-24 10:03:38 +0100 |
| commit | 7dd42d610dcd6f9271d5d44edff52caf633b8abf (patch) | |
| tree | ef0d8d65ce7e76841e05d28008fb50641cf373a2 /target | |
| parent | 9aa420b00e816ba7fc98049aa4961e392ab65d3a (diff) | |
| download | mtk-20170518-7dd42d610dcd6f9271d5d44edff52caf633b8abf.zip mtk-20170518-7dd42d610dcd6f9271d5d44edff52caf633b8abf.tar.gz mtk-20170518-7dd42d610dcd6f9271d5d44edff52caf633b8abf.tar.bz2 | |
lantiq: add FRITZ7360SL phy reset gpios
Due to a hardware bug of Atheros 8030 phys, the driver need to reset
the phys on link state change.
Use the correct compatible string for the at903x phys connected to
switch port 0 and 1.
Fix the pinmux of the gpio lines connected to the reset pin of the phys
and define the reset-pins to let the driver do the fixups.
Fixes FS#343
Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/lantiq/dts/FRITZ7360SL.dts | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/lantiq/dts/FRITZ7360SL.dts b/target/linux/lantiq/dts/FRITZ7360SL.dts index b3cb1c5..0caea7f 100644 --- a/target/linux/lantiq/dts/FRITZ7360SL.dts +++ b/target/linux/lantiq/dts/FRITZ7360SL.dts @@ -70,7 +70,7 @@ }; phy-rst { lantiq,pins = "io37", "io44"; - lantiq,pull = <2>; + lantiq,pull = <0>; lantiq,open-drain; lantiq,output = <1>; }; @@ -160,14 +160,12 @@ reg = <0>; phy-mode = "rmii"; phy-handle = <&phy0>; - // gpios = <&gpio 37 GPIO_ACTIVE_LOW>; }; ethernet@1 { compatible = "lantiq,xrx200-pdi-port"; reg = <1>; phy-mode = "rmii"; phy-handle = <&phy1>; - // gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; ethernet@2 { compatible = "lantiq,xrx200-pdi-port"; @@ -189,11 +187,13 @@ compatible = "lantiq,xrx200-mdio"; phy0: ethernet-phy@0 { reg = <0x00>; - compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + compatible = "ethernet-phy-id004d.d076", "ethernet-phy-ieee802.3-c22"; + reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>; }; phy1: ethernet-phy@1 { reg = <0x01>; - compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + compatible = "ethernet-phy-id004d.d076", "ethernet-phy-ieee802.3-c22"; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; phy11: ethernet-phy@11 { reg = <0x11>; |