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authorGabor Juhos <juhosg@openwrt.org>2009-06-27 16:57:45 +0000
committerGabor Juhos <juhosg@openwrt.org>2009-06-27 16:57:45 +0000
commit8094a7062fcaeb096a4e673c434e245f8b079f0e (patch)
treebd668dfbcc06ca559129c62729cb370d15768d3a /target
parent7da8855c79414434964e13f6555f783b52a6005b (diff)
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mtk-20170518-8094a7062fcaeb096a4e673c434e245f8b079f0e.tar.gz
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add AR913x specific GPIO function bit definitions
SVN-Revision: 16583
Diffstat (limited to 'target')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb-4xx.c4
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h26
2 files changed, 21 insertions, 9 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb-4xx.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb-4xx.c
index 7241929..bed6799 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb-4xx.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb-4xx.c
@@ -153,8 +153,8 @@ static inline void rb433_add_device_spi(void) {}
static void __init rb4xx_generic_setup(void)
{
- ar71xx_gpio_function_enable(GPIO_FUNC_SPI_CS1_EN |
- GPIO_FUNC_SPI_CS2_EN);
+ ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
+ AR71XX_GPIO_FUNC_SPI_CS2_EN);
ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio),
rb4xx_leds_gpio);
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 51afcec..04ea33f 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -214,15 +214,27 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
#define GPIO_REG_INT_ENABLE 0x24
#define GPIO_REG_FUNC 0x28
-#define GPIO_FUNC_STEREO_EN BIT(17)
-#define GPIO_FUNC_SLIC_EN BIT(16)
-#define GPIO_FUNC_SPI_CS2_EN BIT(13)
-#define GPIO_FUNC_SPI_CS1_EN BIT(12)
-#define GPIO_FUNC_UART_EN BIT(8)
-#define GPIO_FUNC_USB_OC_EN BIT(4)
-#define GPIO_FUNC_USB_CLK_EN BIT(0)
+#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17)
+#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16)
+#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13)
+#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12)
+#define AR71XX_GPIO_FUNC_UART_EN BIT(8)
+#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4)
+#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0)
#define AR71XX_GPIO_COUNT 16
+
+#define AR91XX_GPIO_FUNC_WMAC_LED_EN BIT(22)
+#define AR91XX_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
+#define AR91XX_GPIO_FUNC_I2S_REFCLKEN BIT(20)
+#define AR91XX_GPIO_FUNC_I2S_MCKEN BIT(19)
+#define AR91XX_GPIO_FUNC_I2S1_EN BIT(18)
+#define AR91XX_GPIO_FUNC_I2S0_EN BIT(17)
+#define AR91XX_GPIO_FUNC_SLIC_EN BIT(16)
+#define AR91XX_GPIO_FUNC_UART_RTSCTS_EN BIT(9)
+#define AR91XX_GPIO_FUNC_UART_EN BIT(8)
+#define AR91XX_GPIO_FUNC_USB_CLK_EN BIT(4)
+
#define AR91XX_GPIO_COUNT 22
extern void __iomem *ar71xx_gpio_base;