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authorGabor Juhos <juhosg@openwrt.org>2013-07-20 09:53:54 +0000
committerGabor Juhos <juhosg@openwrt.org>2013-07-20 09:53:54 +0000
commitf5f9bce1683d7c92b49838e4bd41b0ee210e4b74 (patch)
tree9b6e4450d7fd74d2fc185a2829ade6d72445626c /target
parent2d8fd8b58cca22d63d7b45714657e13a3cf587c4 (diff)
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kernel/3.10: make emulate_load_store_microMIPS static
This allows the compiler to remove the emulate_load_store_microMIPS function if cpu_has_mmips is defined as zero. Backport of commit 74338805ec6869594d583535f941cb478c94dd73 from 3.11-rc1. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 37478
Diffstat (limited to 'target')
-rw-r--r--target/linux/generic/patches-3.10/001-MIPS-Declare-emulate_load_store_microMIPS-as-a-stati.patch32
1 files changed, 32 insertions, 0 deletions
diff --git a/target/linux/generic/patches-3.10/001-MIPS-Declare-emulate_load_store_microMIPS-as-a-stati.patch b/target/linux/generic/patches-3.10/001-MIPS-Declare-emulate_load_store_microMIPS-as-a-stati.patch
new file mode 100644
index 0000000..f91dbb5
--- /dev/null
+++ b/target/linux/generic/patches-3.10/001-MIPS-Declare-emulate_load_store_microMIPS-as-a-stati.patch
@@ -0,0 +1,32 @@
+From 2b76d9221a02fa69bbb8c1045616afb923fc6bad Mon Sep 17 00:00:00 2001
+From: David Daney <david.daney@cavium.com>
+Date: Fri, 24 May 2013 20:54:08 +0000
+Subject: [PATCH] MIPS: Declare emulate_load_store_microMIPS as a static
+ function.
+
+commit 74338805ec6869594d583535f941cb478c94dd73 upstream.
+
+It is only used from within a single file, it should not be globally
+visible.
+
+Signed-off-by: David Daney <david.daney@cavium.com>
+Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/5325/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/kernel/unaligned.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/kernel/unaligned.c
++++ b/arch/mips/kernel/unaligned.c
+@@ -684,7 +684,8 @@ const int reg16to32[] = { 16, 17, 2, 3,
+ /* Recode table from 16-bit STORE register notation to 32-bit GPR. */
+ const int reg16to32st[] = { 0, 17, 2, 3, 4, 5, 6, 7 };
+
+-void emulate_load_store_microMIPS(struct pt_regs *regs, void __user * addr)
++static void emulate_load_store_microMIPS(struct pt_regs *regs,
++ void __user *addr)
+ {
+ unsigned long value;
+ unsigned int res;