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author | Gabor Juhos <juhosg@openwrt.org> | 2013-03-11 19:52:51 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2013-03-11 19:52:51 +0000 |
commit | 72fc0c1906eb968bd485f1a3110a48cacf7aa05b (patch) | |
tree | ddeeb585984f3c2efd0e1187dc9b40023c578d27 /target | |
parent | 44cc1507e98151b070ab363b345190020caeb44b (diff) | |
download | mtk-20170518-72fc0c1906eb968bd485f1a3110a48cacf7aa05b.zip mtk-20170518-72fc0c1906eb968bd485f1a3110a48cacf7aa05b.tar.gz mtk-20170518-72fc0c1906eb968bd485f1a3110a48cacf7aa05b.tar.bz2 |
ar71xx: add AR934X_GPIO_FUNC_* defines
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35965
Diffstat (limited to 'target')
-rw-r--r-- | target/linux/ar71xx/patches-3.8/601-MIPS-ath79-add-more-register-defines.patch | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/target/linux/ar71xx/patches-3.8/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.8/601-MIPS-ath79-add-more-register-defines.patch index 5cb7584..d9cdc9f 100644 --- a/target/linux/ar71xx/patches-3.8/601-MIPS-ath79-add-more-register-defines.patch +++ b/target/linux/ar71xx/patches-3.8/601-MIPS-ath79-add-more-register-defines.patch @@ -207,7 +207,7 @@ #define AR934X_GPIO_REG_FUNC 0x6c #define AR71XX_GPIO_COUNT 16 -@@ -561,4 +664,133 @@ +@@ -561,4 +664,139 @@ #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 @@ -268,9 +268,15 @@ +#define AR933X_GPIO_FUNC_UART_EN BIT(1) +#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) + -+#define AR934X_GPIO_FUNC_DDR_DQOE_EN BIT(17) -+#define AR934X_GPIO_FUNC_SPI_CS_1_EN BIT(14) -+#define AR934X_GPIO_FUNC_SPI_CS_0_EN BIT(13) ++#define AR934X_GPIO_FUNC_CLK_OBS7_EN BIT(9) ++#define AR934X_GPIO_FUNC_CLK_OBS6_EN BIT(8) ++#define AR934X_GPIO_FUNC_CLK_OBS5_EN BIT(7) ++#define AR934X_GPIO_FUNC_CLK_OBS4_EN BIT(6) ++#define AR934X_GPIO_FUNC_CLK_OBS3_EN BIT(5) ++#define AR934X_GPIO_FUNC_CLK_OBS2_EN BIT(4) ++#define AR934X_GPIO_FUNC_CLK_OBS1_EN BIT(3) ++#define AR934X_GPIO_FUNC_CLK_OBS0_EN BIT(2) ++#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1) + +#define AR934X_GPIO_OUT_GPIO 0x00 + |