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author | Florian Fainelli <florian@openwrt.org> | 2009-10-07 13:05:14 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2009-10-07 13:05:14 +0000 |
commit | 96d804c54f2968987455be55efaed0940fb87d36 (patch) | |
tree | c533c0634dda7cd43750993b16c55aab0a8e496f /toolchain | |
parent | 8517d6dd6c379a63ddfd8af893b2ad763e1487f2 (diff) | |
download | mtk-20170518-96d804c54f2968987455be55efaed0940fb87d36.zip mtk-20170518-96d804c54f2968987455be55efaed0940fb87d36.tar.gz mtk-20170518-96d804c54f2968987455be55efaed0940fb87d36.tar.bz2 |
optimize binaries for the rm5200 cpu present on cobalt, do not use the mips32 isa
SVN-Revision: 17980
Diffstat (limited to 'toolchain')
-rw-r--r-- | toolchain/uClibc/config-0.9.30.1/mipsel.cobalt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/toolchain/uClibc/config-0.9.30.1/mipsel.cobalt b/toolchain/uClibc/config-0.9.30.1/mipsel.cobalt new file mode 100644 index 0000000..323b0aa --- /dev/null +++ b/toolchain/uClibc/config-0.9.30.1/mipsel.cobalt @@ -0,0 +1,17 @@ +ARCH_ANY_ENDIAN=y +ARCH_CFLAGS="-mno-split-addresses" +ARCH_LITTLE_ENDIAN=y +ARCH_WANTS_LITTLE_ENDIAN=y +# CONFIG_MIPS_ISA_1 is not set +# CONFIG_MIPS_ISA_2 is not set +CONFIG_MIPS_ISA_3=y +# CONFIG_MIPS_ISA_4 is not set +# CONFIG_MIPS_ISA_MIPS32 is not set +# CONFIG_MIPS_ISA_MIPS32R2 is not set +# CONFIG_MIPS_ISA_MIPS64 is not set +# CONFIG_MIPS_N32_ABI is not set +# CONFIG_MIPS_N64_ABI is not set +CONFIG_MIPS_O32_ABI=y +TARGET_ARCH="mips" +TARGET_mips=y +UCLIBC_HAS_FPU=y |