diff options
Diffstat (limited to 'package/kernel/mac80211/patches/660-0007-rtl8xxxu-8188e-Enable-scheduler.patch')
-rw-r--r-- | package/kernel/mac80211/patches/660-0007-rtl8xxxu-8188e-Enable-scheduler.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/660-0007-rtl8xxxu-8188e-Enable-scheduler.patch b/package/kernel/mac80211/patches/660-0007-rtl8xxxu-8188e-Enable-scheduler.patch new file mode 100644 index 0000000..99f9152 --- /dev/null +++ b/package/kernel/mac80211/patches/660-0007-rtl8xxxu-8188e-Enable-scheduler.patch @@ -0,0 +1,45 @@ +From 682ffd261c494581b8fdbc81f42035a53c67f5c4 Mon Sep 17 00:00:00 2001 +From: Jes Sorensen <Jes.Sorensen@redhat.com> +Date: Wed, 29 Jun 2016 11:07:13 -0400 +Subject: [PATCH] rtl8xxxu: 8188e: Enable scheduler + +This enables the schduler, DMA, etc, except for MAC RX/TX which has to +be set after REG_TRXFF_BNDY due to a hardware bug in the 8188e + +Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> +--- + drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c ++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c +@@ -172,6 +172,7 @@ exit: + + static int rtl8188eu_power_on(struct rtl8xxxu_priv *priv) + { ++ u16 val16; + int ret; + + rtl8188e_disabled_to_emu(priv); +@@ -180,6 +181,21 @@ static int rtl8188eu_power_on(struct rtl + if (ret) + goto exit; + ++ /* ++ * Enable MAC DMA/WMAC/SCHEDULE/SEC block ++ * Set CR bit10 to enable 32k calibration. ++ * We do not set CR_MAC_TX_ENABLE | CR_MAC_RX_ENABLE here ++ * due to a hardware bug in the 88E, requiring those to be ++ * set after REG_TRXFF_BNDY is set. If not the RXFF bundary ++ * will get set to a larger buffer size than the real buffer ++ * size. ++ */ ++ val16 = (CR_HCI_TXDMA_ENABLE | CR_HCI_RXDMA_ENABLE | ++ CR_TXDMA_ENABLE | CR_RXDMA_ENABLE | ++ CR_PROTOCOL_ENABLE | CR_SCHEDULE_ENABLE | ++ CR_SECURITY_ENABLE | CR_CALTIMER_ENABLE); ++ rtl8xxxu_write16(priv, REG_CR, val16); ++ + exit: + return ret; + } |