diff options
Diffstat (limited to 'package/madwifi/patches/306-mib_intr_workaround.patch')
| -rw-r--r-- | package/madwifi/patches/306-mib_intr_workaround.patch | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/package/madwifi/patches/306-mib_intr_workaround.patch b/package/madwifi/patches/306-mib_intr_workaround.patch new file mode 100644 index 0000000..c00c73a --- /dev/null +++ b/package/madwifi/patches/306-mib_intr_workaround.patch @@ -0,0 +1,83 @@ +Index: madwifi-ng-r2568-20070710/ath/if_ath.c +=================================================================== +--- madwifi-ng-r2568-20070710.orig/ath/if_ath.c 2007-08-01 11:07:47.882943145 +0200 ++++ madwifi-ng-r2568-20070710/ath/if_ath.c 2007-08-01 11:41:11.781138794 +0200 +@@ -203,6 +203,7 @@ + static void ath_flushrecv(struct ath_softc *); + static void ath_chan_change(struct ath_softc *, struct ieee80211_channel *); + static void ath_calibrate(unsigned long); ++static void ath_mib_enable(unsigned long); + static int ath_newstate(struct ieee80211vap *, enum ieee80211_state, int); + + static void ath_scan_start(struct ieee80211com *); +@@ -660,6 +661,10 @@ + sc->sc_cal_ch.function = ath_calibrate; + sc->sc_cal_ch.data = (unsigned long) dev; + ++ init_timer(&sc->sc_mib_enable); ++ sc->sc_mib_enable.function = ath_mib_enable; ++ sc->sc_mib_enable.data = (unsigned long) sc; ++ + #ifdef ATH_SUPERG_DYNTURBO + init_timer(&sc->sc_dturbo_switch_mode); + sc->sc_dturbo_switch_mode.function = ath_turbo_switch_mode; +@@ -1751,16 +1756,19 @@ + if (status & HAL_INT_MIB) { + sc->sc_stats.ast_mib++; + /* +- * Disable interrupts until we service the MIB +- * interrupt; otherwise it will continue to fire. +- */ +- ath_hal_intrset(ah, 0); +- /* +- * Let the HAL handle the event. We assume it will +- * clear whatever condition caused the interrupt. ++ * When the card receives lots of PHY errors, the MIB ++ * interrupt will fire at a very rapid rate. We will use ++ * a timer to enforce at least 1 jiffy delay between ++ * MIB interrupts. This should be unproblematic, since ++ * the hardware will continue to update the counters in the ++ * mean time. + */ +- ath_hal_mibevent(ah, &sc->sc_halstats); ++ sc->sc_imask &= ~HAL_INT_MIB; + ath_hal_intrset(ah, sc->sc_imask); ++ mod_timer(&sc->sc_mib_enable, jiffies + 1); ++ ++ /* Let the HAL handle the event. */ ++ ath_hal_mibevent(ah, &sc->sc_halstats); + } + } + if (needmark) +@@ -8029,6 +8037,19 @@ + } + + /* ++ * Enable MIB interrupts again, after the ISR disabled them ++ * to slow down the rate of PHY error reporting. ++ */ ++static void ++ath_mib_enable(unsigned long arg) ++{ ++ struct ath_softc *sc = (struct ath_softc *) arg; ++ ++ sc->sc_imask |= HAL_INT_MIB; ++ ath_hal_intrset(sc->sc_ah, sc->sc_imask); ++} ++ ++/* + * Periodically recalibrate the PHY to account + * for temperature/environment changes. + */ +Index: madwifi-ng-r2568-20070710/ath/if_athvar.h +=================================================================== +--- madwifi-ng-r2568-20070710.orig/ath/if_athvar.h 2007-08-01 11:33:50.800008711 +0200 ++++ madwifi-ng-r2568-20070710/ath/if_athvar.h 2007-08-01 11:34:33.202425088 +0200 +@@ -687,6 +687,7 @@ + struct ctl_table *sc_sysctls; + + u_int16_t sc_reapcount; /* # of tx buffers reaped after net dev stopped */ ++ struct timer_list sc_mib_enable; + + #ifdef ATH_REVERSE_ENGINEERING + u_int8_t register_snapshot[MAX_REGISTER_ADDRESS]; |