diff options
Diffstat (limited to 'target/linux/ar71xx/files/drivers/spi')
| -rw-r--r-- | target/linux/ar71xx/files/drivers/spi/spi-ap83.c | 283 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c | 441 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/drivers/spi/spi-rb4xx.c | 507 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/drivers/spi/spi-vsc7385.c | 621 |
4 files changed, 0 insertions, 1852 deletions
diff --git a/target/linux/ar71xx/files/drivers/spi/spi-ap83.c b/target/linux/ar71xx/files/drivers/spi/spi-ap83.c deleted file mode 100644 index 33843a6..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-ap83.c +++ /dev/null @@ -1,283 +0,0 @@ -/* - * Atheros AP83 board specific SPI Controller driver - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/workqueue.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/spi/spi_bitbang.h> -#include <linux/bitops.h> -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#define DRV_DESC "Atheros AP83 board SPI Controller driver" -#define DRV_VERSION "0.1.0" -#define DRV_NAME "ap83-spi" - -#define AP83_SPI_CLK_HIGH (1 << 23) -#define AP83_SPI_CLK_LOW 0 -#define AP83_SPI_MOSI_HIGH (1 << 22) -#define AP83_SPI_MOSI_LOW 0 - -#define AP83_SPI_GPIO_CS 1 -#define AP83_SPI_GPIO_MISO 3 - -struct ap83_spi { - struct spi_bitbang bitbang; - void __iomem *base; - u32 addr; - - struct platform_device *pdev; -}; - -static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg) -{ - return __raw_readl(sp->base + reg); -} - -static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi) -{ - return spi_master_get_devdata(spi->master); -} - -static inline void setsck(struct spi_device *spi, int val) -{ - struct ap83_spi *sp = spidev_to_sp(spi); - - if (val) - sp->addr |= AP83_SPI_CLK_HIGH; - else - sp->addr &= ~AP83_SPI_CLK_HIGH; - - dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n", - sp->addr, (val) ? "HIGH" : "LOW"); - - ap83_spi_rr(sp, sp->addr); -} - -static inline void setmosi(struct spi_device *spi, int val) -{ - struct ap83_spi *sp = spidev_to_sp(spi); - - if (val) - sp->addr |= AP83_SPI_MOSI_HIGH; - else - sp->addr &= ~AP83_SPI_MOSI_HIGH; - - dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n", - sp->addr, (val) ? "HIGH" : "LOW"); - - ap83_spi_rr(sp, sp->addr); -} - -static inline u32 getmiso(struct spi_device *spi) -{ - u32 ret; - - ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0; - dev_dbg(&spi->dev, "get MISO: %d\n", ret); - - return ret; -} - -static inline void do_spidelay(struct spi_device *spi, unsigned nsecs) -{ - ndelay(nsecs); -} - -static void ap83_spi_chipselect(struct spi_device *spi, int on) -{ - struct ap83_spi *sp = spidev_to_sp(spi); - - dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1); - - if (on) { - ath79_flash_acquire(); - - sp->addr = 0; - ap83_spi_rr(sp, sp->addr); - - gpio_set_value(AP83_SPI_GPIO_CS, 0); - } else { - gpio_set_value(AP83_SPI_GPIO_CS, 1); - ath79_flash_release(); - } -} - -#define spidelay(nsecs) \ - do { \ - /* Steal the spi_device pointer from our caller. \ - * The bitbang-API should probably get fixed here... */ \ - do_spidelay(spi, nsecs); \ - } while (0) - -#define EXPAND_BITBANG_TXRX -#include <linux/spi/spi_bitbang.h> -#include "spi-bitbang-txrx.h" - -static u32 ap83_spi_txrx_mode0(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); -} - -static u32 ap83_spi_txrx_mode1(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits); -} - -static u32 ap83_spi_txrx_mode2(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits); -} - -static u32 ap83_spi_txrx_mode3(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits); -} - -static int ap83_spi_probe(struct platform_device *pdev) -{ - struct spi_master *master; - struct ap83_spi *sp; - struct ap83_spi_platform_data *pdata; - struct resource *r; - int ret; - - ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso"); - if (ret) { - dev_err(&pdev->dev, "gpio request failed for MISO\n"); - return ret; - } - - ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs"); - if (ret) { - dev_err(&pdev->dev, "gpio request failed for CS\n"); - goto err_free_miso; - } - - ret = gpio_direction_input(AP83_SPI_GPIO_MISO); - if (ret) { - dev_err(&pdev->dev, "unable to set direction of MISO\n"); - goto err_free_cs; - } - - ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0); - if (ret) { - dev_err(&pdev->dev, "unable to set direction of CS\n"); - goto err_free_cs; - } - - master = spi_alloc_master(&pdev->dev, sizeof(*sp)); - if (master == NULL) { - dev_err(&pdev->dev, "failed to allocate spi master\n"); - return -ENOMEM; - } - - sp = spi_master_get_devdata(master); - platform_set_drvdata(pdev, sp); - - pdata = pdev->dev.platform_data; - - sp->bitbang.master = spi_master_get(master); - sp->bitbang.chipselect = ap83_spi_chipselect; - sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0; - sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1; - sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2; - sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3; - - sp->bitbang.master->bus_num = pdev->id; - sp->bitbang.master->num_chipselect = 1; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (r == NULL) { - ret = -ENOENT; - goto err_spi_put; - } - - sp->base = ioremap_nocache(r->start, r->end - r->start + 1); - if (!sp->base) { - ret = -ENXIO; - goto err_spi_put; - } - - ret = spi_bitbang_start(&sp->bitbang); - if (!ret) - goto err_unmap; - - dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start); - - return 0; - -err_unmap: - iounmap(sp->base); -err_spi_put: - platform_set_drvdata(pdev, NULL); - spi_master_put(sp->bitbang.master); - -err_free_cs: - gpio_free(AP83_SPI_GPIO_CS); -err_free_miso: - gpio_free(AP83_SPI_GPIO_MISO); - return ret; -} - -static int ap83_spi_remove(struct platform_device *pdev) -{ - struct ap83_spi *sp = platform_get_drvdata(pdev); - - spi_bitbang_stop(&sp->bitbang); - iounmap(sp->base); - platform_set_drvdata(pdev, NULL); - spi_master_put(sp->bitbang.master); - - return 0; -} - -static struct platform_driver ap83_spi_drv = { - .probe = ap83_spi_probe, - .remove = ap83_spi_remove, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init ap83_spi_init(void) -{ - return platform_driver_register(&ap83_spi_drv); -} -module_init(ap83_spi_init); - -static void __exit ap83_spi_exit(void) -{ - platform_driver_unregister(&ap83_spi_drv); -} -module_exit(ap83_spi_exit); - -MODULE_ALIAS("platform:" DRV_NAME); -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c b/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c deleted file mode 100644 index a8d5282..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c +++ /dev/null @@ -1,441 +0,0 @@ -/* - * SPI driver for the CPLD chip on the Mikrotik RB4xx boards - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This file was based on the patches for Linux 2.6.27.39 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/device.h> -#include <linux/bitops.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> -#include <linux/slab.h> - -#include <asm/mach-ath79/rb4xx_cpld.h> - -#define DRV_NAME "spi-rb4xx-cpld" -#define DRV_DESC "RB4xx CPLD driver" -#define DRV_VERSION "0.1.0" - -#define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */ -#define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */ -#define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */ -#define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */ -#define CPLD_CMD_LED5_ON 0x0c /* send cmd */ -#define CPLD_CMD_LED5_OFF 0x0d /* send cmd */ - -struct rb4xx_cpld { - struct spi_device *spi; - struct mutex lock; - struct gpio_chip chip; - unsigned int config; -}; - -static struct rb4xx_cpld *rb4xx_cpld; - -static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip) -{ - return container_of(chip, struct rb4xx_cpld, chip); -} - -static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd) -{ - struct spi_transfer t[1]; - struct spi_message m; - unsigned char tx_buf[1]; - int err; - - spi_message_init(&m); - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = tx_buf; - t[0].len = sizeof(tx_buf); - spi_message_add_tail(&t[0], &m); - - tx_buf[0] = cmd; - - err = spi_sync(cpld->spi, &m); - return err; -} - -static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config) -{ - struct spi_transfer t[1]; - struct spi_message m; - unsigned char cmd[2]; - int err; - - spi_message_init(&m); - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - cmd[0] = CPLD_CMD_WRITE_CFG; - cmd[1] = config; - - err = spi_sync(cpld->spi, &m); - return err; -} - -static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask, - unsigned value) -{ - unsigned int config; - int err; - - config = cpld->config & ~mask; - config |= value; - - if ((cpld->config ^ config) & 0xff) { - err = rb4xx_cpld_write_cfg(cpld, config); - if (err) - return err; - } - - if ((cpld->config ^ config) & CPLD_CFG_nLED5) { - err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON : - CPLD_CMD_LED5_OFF); - if (err) - return err; - } - - cpld->config = config; - return 0; -} - -int rb4xx_cpld_change_cfg(unsigned mask, unsigned value) -{ - int ret; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - mutex_lock(&rb4xx_cpld->lock); - ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value); - mutex_unlock(&rb4xx_cpld->lock); - - return ret; -} -EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg); - -int rb4xx_cpld_read_from(unsigned addr, unsigned char *rx_buf, - const unsigned char *verify_buf, unsigned count) -{ - const unsigned char cmd[5] = { - CPLD_CMD_READ_FAST, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - addr & 0xff, - 0 - }; - struct spi_transfer t[2] = { - { - .tx_buf = &cmd, - .len = 5, - }, - { - .tx_buf = verify_buf, - .rx_buf = rx_buf, - .len = count, - .verify = (verify_buf != NULL), - }, - }; - struct spi_message m; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - m.fast_read = 1; - spi_message_add_tail(&t[0], &m); - spi_message_add_tail(&t[1], &m); - return spi_sync(rb4xx_cpld->spi, &m); -} -EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from); - -#if 0 -int rb4xx_cpld_read(unsigned char *buf, unsigned char *verify_buf, - unsigned count) -{ - struct spi_transfer t[2]; - struct spi_message m; - unsigned char cmd[2]; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - memset(&t, 0, sizeof(t)); - - /* send command */ - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - cmd[0] = CPLD_CMD_READ_NAND; - cmd[1] = 0; - - /* read data */ - t[1].rx_buf = buf; - t[1].len = count; - spi_message_add_tail(&t[1], &m); - - return spi_sync(rb4xx_cpld->spi, &m); -} -#else -int rb4xx_cpld_read(unsigned char *rx_buf, const unsigned char *verify_buf, - unsigned count) -{ - static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 }; - struct spi_transfer t[2] = { - { - .tx_buf = &cmd, - .len = 2, - }, { - .tx_buf = verify_buf, - .rx_buf = rx_buf, - .len = count, - .verify = (verify_buf != NULL), - }, - }; - struct spi_message m; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - spi_message_add_tail(&t[0], &m); - spi_message_add_tail(&t[1], &m); - return spi_sync(rb4xx_cpld->spi, &m); -} -#endif -EXPORT_SYMBOL_GPL(rb4xx_cpld_read); - -int rb4xx_cpld_write(const unsigned char *buf, unsigned count) -{ -#if 0 - struct spi_transfer t[3]; - struct spi_message m; - unsigned char cmd[1]; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - memset(&t, 0, sizeof(t)); - spi_message_init(&m); - - /* send command */ - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - cmd[0] = CPLD_CMD_WRITE_NAND; - - /* write data */ - t[1].tx_buf = buf; - t[1].len = count; - spi_message_add_tail(&t[1], &m); - - /* send idle */ - t[2].len = 1; - spi_message_add_tail(&t[2], &m); - - return spi_sync(rb4xx_cpld->spi, &m); -#else - static const unsigned char cmd = CPLD_CMD_WRITE_NAND; - struct spi_transfer t[3] = { - { - .tx_buf = &cmd, - .len = 1, - }, { - .tx_buf = buf, - .len = count, - .fast_write = 1, - }, { - .len = 1, - .fast_write = 1, - }, - }; - struct spi_message m; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - spi_message_add_tail(&t[0], &m); - spi_message_add_tail(&t[1], &m); - spi_message_add_tail(&t[2], &m); - return spi_sync(rb4xx_cpld->spi, &m); -#endif -} -EXPORT_SYMBOL_GPL(rb4xx_cpld_write); - -static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct rb4xx_cpld *cpld = gpio_to_cpld(chip); - int ret; - - mutex_lock(&cpld->lock); - ret = (cpld->config >> offset) & 1; - mutex_unlock(&cpld->lock); - - return ret; -} - -static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset, - int value) -{ - struct rb4xx_cpld *cpld = gpio_to_cpld(chip); - - mutex_lock(&cpld->lock); - __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); - mutex_unlock(&cpld->lock); -} - -static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - return -EOPNOTSUPP; -} - -static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, - int value) -{ - struct rb4xx_cpld *cpld = gpio_to_cpld(chip); - int ret; - - mutex_lock(&cpld->lock); - ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); - mutex_unlock(&cpld->lock); - - return ret; -} - -static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base) -{ - int err; - - /* init config */ - cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 | - CPLD_CFG_nLED4 | CPLD_CFG_nCE; - rb4xx_cpld_write_cfg(cpld, cpld->config); - - /* setup GPIO chip */ - cpld->chip.label = DRV_NAME; - - cpld->chip.get = rb4xx_cpld_gpio_get; - cpld->chip.set = rb4xx_cpld_gpio_set; - cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input; - cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output; - - cpld->chip.base = base; - cpld->chip.ngpio = CPLD_NUM_GPIOS; - cpld->chip.can_sleep = 1; - cpld->chip.dev = &cpld->spi->dev; - cpld->chip.owner = THIS_MODULE; - - err = gpiochip_add(&cpld->chip); - if (err) - dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n", - err); - - return err; -} - -static int rb4xx_cpld_probe(struct spi_device *spi) -{ - struct rb4xx_cpld *cpld; - struct rb4xx_cpld_platform_data *pdata; - int err; - - pdata = spi->dev.platform_data; - if (!pdata) { - dev_dbg(&spi->dev, "no platform data\n"); - return -EINVAL; - } - - cpld = kzalloc(sizeof(*cpld), GFP_KERNEL); - if (!cpld) { - dev_err(&spi->dev, "no memory for private data\n"); - return -ENOMEM; - } - - mutex_init(&cpld->lock); - cpld->spi = spi_dev_get(spi); - dev_set_drvdata(&spi->dev, cpld); - - spi->mode = SPI_MODE_0; - spi->bits_per_word = 8; - err = spi_setup(spi); - if (err) { - dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); - goto err_drvdata; - } - - err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base); - if (err) - goto err_drvdata; - - rb4xx_cpld = cpld; - - return 0; - -err_drvdata: - dev_set_drvdata(&spi->dev, NULL); - kfree(cpld); - - return err; -} - -static int rb4xx_cpld_remove(struct spi_device *spi) -{ - struct rb4xx_cpld *cpld; - - rb4xx_cpld = NULL; - cpld = dev_get_drvdata(&spi->dev); - dev_set_drvdata(&spi->dev, NULL); - kfree(cpld); - - return 0; -} - -static struct spi_driver rb4xx_cpld_driver = { - .driver = { - .name = DRV_NAME, - .bus = &spi_bus_type, - .owner = THIS_MODULE, - }, - .probe = rb4xx_cpld_probe, - .remove = rb4xx_cpld_remove, -}; - -static int __init rb4xx_cpld_init(void) -{ - return spi_register_driver(&rb4xx_cpld_driver); -} -module_init(rb4xx_cpld_init); - -static void __exit rb4xx_cpld_exit(void) -{ - spi_unregister_driver(&rb4xx_cpld_driver); -} -module_exit(rb4xx_cpld_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx.c b/target/linux/ar71xx/files/drivers/spi/spi-rb4xx.c deleted file mode 100644 index 56260ff..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx.c +++ /dev/null @@ -1,507 +0,0 @@ -/* - * SPI controller driver for the Mikrotik RB4xx boards - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This file was based on the patches for Linux 2.6.27.39 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/workqueue.h> -#include <linux/platform_device.h> -#include <linux/spi/spi.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#define DRV_NAME "rb4xx-spi" -#define DRV_DESC "Mikrotik RB4xx SPI controller driver" -#define DRV_VERSION "0.1.0" - -#define SPI_CTRL_FASTEST 0x40 -#define SPI_FLASH_HZ 33333334 -#define SPI_CPLD_HZ 33333334 - -#define CPLD_CMD_READ_FAST 0x0b - -#undef RB4XX_SPI_DEBUG - -struct rb4xx_spi { - void __iomem *base; - struct spi_master *master; - - unsigned spi_ctrl_flash; - unsigned spi_ctrl_fread; - - struct clk *ahb_clk; - unsigned long ahb_freq; - - spinlock_t lock; - struct list_head queue; - int busy:1; - int cs_wait; -}; - -static unsigned spi_clk_low = AR71XX_SPI_IOC_CS1; - -#ifdef RB4XX_SPI_DEBUG -static inline void do_spi_delay(void) -{ - ndelay(20000); -} -#else -static inline void do_spi_delay(void) { } -#endif - -static inline void do_spi_init(struct spi_device *spi) -{ - unsigned cs = AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1; - - if (!(spi->mode & SPI_CS_HIGH)) - cs ^= (spi->chip_select == 2) ? AR71XX_SPI_IOC_CS1 : - AR71XX_SPI_IOC_CS0; - - spi_clk_low = cs; -} - -static inline void do_spi_finish(void __iomem *base) -{ - do_spi_delay(); - __raw_writel(AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1, - base + AR71XX_SPI_REG_IOC); -} - -static inline void do_spi_clk(void __iomem *base, int bit) -{ - unsigned bval = spi_clk_low | ((bit & 1) ? AR71XX_SPI_IOC_DO : 0); - - do_spi_delay(); - __raw_writel(bval, base + AR71XX_SPI_REG_IOC); - do_spi_delay(); - __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); -} - -static void do_spi_byte(void __iomem *base, unsigned char byte) -{ - do_spi_clk(base, byte >> 7); - do_spi_clk(base, byte >> 6); - do_spi_clk(base, byte >> 5); - do_spi_clk(base, byte >> 4); - do_spi_clk(base, byte >> 3); - do_spi_clk(base, byte >> 2); - do_spi_clk(base, byte >> 1); - do_spi_clk(base, byte); - - pr_debug("spi_byte sent 0x%02x got 0x%02x\n", - (unsigned)byte, - (unsigned char)__raw_readl(base + AR71XX_SPI_REG_RDS)); -} - -static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1, - unsigned bit2) -{ - unsigned bval = (spi_clk_low | - ((bit1 & 1) ? AR71XX_SPI_IOC_DO : 0) | - ((bit2 & 1) ? AR71XX_SPI_IOC_CS2 : 0)); - do_spi_delay(); - __raw_writel(bval, base + AR71XX_SPI_REG_IOC); - do_spi_delay(); - __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); -} - -static void do_spi_byte_fast(void __iomem *base, unsigned char byte) -{ - do_spi_clk_fast(base, byte >> 7, byte >> 6); - do_spi_clk_fast(base, byte >> 5, byte >> 4); - do_spi_clk_fast(base, byte >> 3, byte >> 2); - do_spi_clk_fast(base, byte >> 1, byte >> 0); - - pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n", - (unsigned)byte, - (unsigned char) __raw_readl(base + AR71XX_SPI_REG_RDS)); -} - -static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t) -{ - const unsigned char *rxv_ptr = NULL; - const unsigned char *tx_ptr = t->tx_buf; - unsigned char *rx_ptr = t->rx_buf; - unsigned i; - - pr_debug("spi_txrx len %u tx %u rx %u\n", - t->len, - (t->tx_buf ? 1 : 0), - (t->rx_buf ? 1 : 0)); - - if (t->verify) { - rxv_ptr = tx_ptr; - tx_ptr = NULL; - } - - for (i = 0; i < t->len; ++i) { - unsigned char sdata = tx_ptr ? tx_ptr[i] : 0; - - if (t->fast_write) - do_spi_byte_fast(base, sdata); - else - do_spi_byte(base, sdata); - - if (rx_ptr) { - rx_ptr[i] = __raw_readl(base + AR71XX_SPI_REG_RDS) & 0xff; - } else if (rxv_ptr) { - unsigned char c = __raw_readl(base + AR71XX_SPI_REG_RDS); - if (rxv_ptr[i] != c) - return i; - } - } - - return i; -} - -static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi, - struct spi_message *m) -{ - struct spi_transfer *t; - const unsigned char *tx_ptr; - unsigned addr; - void __iomem *base = rbspi->base; - - /* check for exactly two transfers */ - if (list_empty(&m->transfers) || - list_is_last(m->transfers.next, &m->transfers) || - !list_is_last(m->transfers.next->next, &m->transfers)) { - return -1; - } - - /* first transfer contains command and address */ - t = list_entry(m->transfers.next, - struct spi_transfer, transfer_list); - - if (t->len != 5 || t->tx_buf == NULL) - return -1; - - tx_ptr = t->tx_buf; - if (tx_ptr[0] != CPLD_CMD_READ_FAST) - return -1; - - addr = tx_ptr[1]; - addr = tx_ptr[2] | (addr << 8); - addr = tx_ptr[3] | (addr << 8); - addr += (unsigned) base; - - m->actual_length += t->len; - - /* second transfer contains data itself */ - t = list_entry(m->transfers.next->next, - struct spi_transfer, transfer_list); - - if (t->tx_buf && !t->verify) - return -1; - - __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); - __raw_writel(rbspi->spi_ctrl_fread, base + AR71XX_SPI_REG_CTRL); - __raw_writel(0, base + AR71XX_SPI_REG_FS); - - if (t->rx_buf) { - memcpy(t->rx_buf, (const void *)addr, t->len); - } else if (t->tx_buf) { - unsigned char buf[t->len]; - memcpy(buf, (const void *)addr, t->len); - if (memcmp(t->tx_buf, buf, t->len) != 0) - m->status = -EMSGSIZE; - } - m->actual_length += t->len; - - if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) { - __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); - __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); - __raw_writel(0, base + AR71XX_SPI_REG_FS); - } - - return 0; -} - -static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m) -{ - struct spi_transfer *t = NULL; - void __iomem *base = rbspi->base; - - m->status = 0; - if (list_empty(&m->transfers)) - return -1; - - if (m->fast_read) - if (rb4xx_spi_read_fast(rbspi, m) == 0) - return -1; - - __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); - __raw_writel(SPI_CTRL_FASTEST, base + AR71XX_SPI_REG_CTRL); - do_spi_init(m->spi); - - list_for_each_entry(t, &m->transfers, transfer_list) { - int len; - - len = rb4xx_spi_txrx(base, t); - if (len != t->len) { - m->status = -EMSGSIZE; - break; - } - m->actual_length += len; - - if (t->cs_change) { - if (list_is_last(&t->transfer_list, &m->transfers)) { - /* wait for continuation */ - return m->spi->chip_select; - } - do_spi_finish(base); - ndelay(100); - } - } - - do_spi_finish(base); - __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); - __raw_writel(0, base + AR71XX_SPI_REG_FS); - return -1; -} - -static void rb4xx_spi_process_queue_locked(struct rb4xx_spi *rbspi, - unsigned long *flags) -{ - int cs = rbspi->cs_wait; - - rbspi->busy = 1; - while (!list_empty(&rbspi->queue)) { - struct spi_message *m; - - list_for_each_entry(m, &rbspi->queue, queue) - if (cs < 0 || cs == m->spi->chip_select) - break; - - if (&m->queue == &rbspi->queue) - break; - - list_del_init(&m->queue); - spin_unlock_irqrestore(&rbspi->lock, *flags); - - cs = rb4xx_spi_msg(rbspi, m); - m->complete(m->context); - - spin_lock_irqsave(&rbspi->lock, *flags); - } - - rbspi->cs_wait = cs; - rbspi->busy = 0; - - if (cs >= 0) { - /* TODO: add timer to unlock cs after 1s inactivity */ - } -} - -static int rb4xx_spi_transfer(struct spi_device *spi, - struct spi_message *m) -{ - struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); - unsigned long flags; - - m->actual_length = 0; - m->status = -EINPROGRESS; - - spin_lock_irqsave(&rbspi->lock, flags); - list_add_tail(&m->queue, &rbspi->queue); - if (rbspi->busy || - (rbspi->cs_wait >= 0 && rbspi->cs_wait != m->spi->chip_select)) { - /* job will be done later */ - spin_unlock_irqrestore(&rbspi->lock, flags); - return 0; - } - - /* process job in current context */ - rb4xx_spi_process_queue_locked(rbspi, &flags); - spin_unlock_irqrestore(&rbspi->lock, flags); - - return 0; -} - -static int rb4xx_spi_setup(struct spi_device *spi) -{ - struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); - unsigned long flags; - - if (spi->mode & ~(SPI_CS_HIGH)) { - dev_err(&spi->dev, "mode %x not supported\n", - (unsigned) spi->mode); - return -EINVAL; - } - - if (spi->bits_per_word != 8 && spi->bits_per_word != 0) { - dev_err(&spi->dev, "bits_per_word %u not supported\n", - (unsigned) spi->bits_per_word); - return -EINVAL; - } - - spin_lock_irqsave(&rbspi->lock, flags); - if (rbspi->cs_wait == spi->chip_select && !rbspi->busy) { - rbspi->cs_wait = -1; - rb4xx_spi_process_queue_locked(rbspi, &flags); - } - spin_unlock_irqrestore(&rbspi->lock, flags); - - return 0; -} - -static unsigned get_spi_ctrl(struct rb4xx_spi *rbspi, unsigned hz_max, - const char *name) -{ - unsigned div; - - div = (rbspi->ahb_freq - 1) / (2 * hz_max); - - /* - * CPU has a bug at (div == 0) - first bit read is random - */ - if (div == 0) - ++div; - - if (name) { - unsigned ahb_khz = (rbspi->ahb_freq + 500) / 1000; - unsigned div_real = 2 * (div + 1); - pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n", - name, - ahb_khz / div_real, - ahb_khz, div_real); - } - - return SPI_CTRL_FASTEST + div; -} - -static int rb4xx_spi_probe(struct platform_device *pdev) -{ - struct spi_master *master; - struct rb4xx_spi *rbspi; - struct resource *r; - int err = 0; - - master = spi_alloc_master(&pdev->dev, sizeof(*rbspi)); - if (master == NULL) { - dev_err(&pdev->dev, "no memory for spi_master\n"); - err = -ENOMEM; - goto err_out; - } - - master->bus_num = 0; - master->num_chipselect = 3; - master->setup = rb4xx_spi_setup; - master->transfer = rb4xx_spi_transfer; - - rbspi = spi_master_get_devdata(master); - - rbspi->ahb_clk = clk_get(&pdev->dev, "ahb"); - if (IS_ERR(rbspi->ahb_clk)) { - err = PTR_ERR(rbspi->ahb_clk); - goto err_put_master; - } - - err = clk_enable(rbspi->ahb_clk); - if (err) - goto err_clk_put; - - rbspi->ahb_freq = clk_get_rate(rbspi->ahb_clk); - if (!rbspi->ahb_freq) { - err = -EINVAL; - goto err_clk_disable; - } - - platform_set_drvdata(pdev, rbspi); - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (r == NULL) { - err = -ENOENT; - goto err_clk_disable; - } - - rbspi->base = ioremap(r->start, r->end - r->start + 1); - if (!rbspi->base) { - err = -ENXIO; - goto err_clk_disable; - } - - rbspi->master = master; - rbspi->spi_ctrl_flash = get_spi_ctrl(rbspi, SPI_FLASH_HZ, "FLASH"); - rbspi->spi_ctrl_fread = get_spi_ctrl(rbspi, SPI_CPLD_HZ, "CPLD"); - rbspi->cs_wait = -1; - - spin_lock_init(&rbspi->lock); - INIT_LIST_HEAD(&rbspi->queue); - - err = spi_register_master(master); - if (err) { - dev_err(&pdev->dev, "failed to register SPI master\n"); - goto err_iounmap; - } - - return 0; - -err_iounmap: - iounmap(rbspi->base); -err_clk_disable: - clk_disable(rbspi->ahb_clk); -err_clk_put: - clk_put(rbspi->ahb_clk); -err_put_master: - platform_set_drvdata(pdev, NULL); - spi_master_put(master); -err_out: - return err; -} - -static int rb4xx_spi_remove(struct platform_device *pdev) -{ - struct rb4xx_spi *rbspi = platform_get_drvdata(pdev); - - iounmap(rbspi->base); - clk_disable(rbspi->ahb_clk); - clk_put(rbspi->ahb_clk); - platform_set_drvdata(pdev, NULL); - spi_master_put(rbspi->master); - - return 0; -} - -static struct platform_driver rb4xx_spi_drv = { - .probe = rb4xx_spi_probe, - .remove = rb4xx_spi_remove, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init rb4xx_spi_init(void) -{ - return platform_driver_register(&rb4xx_spi_drv); -} -subsys_initcall(rb4xx_spi_init); - -static void __exit rb4xx_spi_exit(void) -{ - platform_driver_unregister(&rb4xx_spi_drv); -} - -module_exit(rb4xx_spi_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/spi/spi-vsc7385.c b/target/linux/ar71xx/files/drivers/spi/spi-vsc7385.c deleted file mode 100644 index b712e71..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-vsc7385.c +++ /dev/null @@ -1,621 +0,0 @@ -/* - * SPI driver for the Vitesse VSC7385 ethernet switch - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/bitops.h> -#include <linux/firmware.h> -#include <linux/spi/spi.h> -#include <linux/spi/vsc7385.h> - -#define DRV_NAME "spi-vsc7385" -#define DRV_DESC "Vitesse VSC7385 Gbit ethernet switch driver" -#define DRV_VERSION "0.1.0" - -#define VSC73XX_BLOCK_MAC 0x1 -#define VSC73XX_BLOCK_2 0x2 -#define VSC73XX_BLOCK_MII 0x3 -#define VSC73XX_BLOCK_4 0x4 -#define VSC73XX_BLOCK_5 0x5 -#define VSC73XX_BLOCK_SYSTEM 0x7 - -#define VSC73XX_SUBBLOCK_PORT_0 0 -#define VSC73XX_SUBBLOCK_PORT_1 1 -#define VSC73XX_SUBBLOCK_PORT_2 2 -#define VSC73XX_SUBBLOCK_PORT_3 3 -#define VSC73XX_SUBBLOCK_PORT_4 4 -#define VSC73XX_SUBBLOCK_PORT_MAC 6 - -/* MAC Block registers */ -#define VSC73XX_MAC_CFG 0x0 -#define VSC73XX_ADVPORTM 0x19 -#define VSC73XX_RXOCT 0x50 -#define VSC73XX_TXOCT 0x51 -#define VSC73XX_C_RX0 0x52 -#define VSC73XX_C_RX1 0x53 -#define VSC73XX_C_RX2 0x54 -#define VSC73XX_C_TX0 0x55 -#define VSC73XX_C_TX1 0x56 -#define VSC73XX_C_TX2 0x57 -#define VSC73XX_C_CFG 0x58 - -/* MAC_CFG register bits */ -#define VSC73XX_MAC_CFG_WEXC_DIS (1 << 31) -#define VSC73XX_MAC_CFG_PORT_RST (1 << 29) -#define VSC73XX_MAC_CFG_TX_EN (1 << 28) -#define VSC73XX_MAC_CFG_SEED_LOAD (1 << 27) -#define VSC73XX_MAC_CFG_FDX (1 << 18) -#define VSC73XX_MAC_CFG_GIGE (1 << 17) -#define VSC73XX_MAC_CFG_RX_EN (1 << 16) -#define VSC73XX_MAC_CFG_VLAN_DBLAWR (1 << 15) -#define VSC73XX_MAC_CFG_VLAN_AWR (1 << 14) -#define VSC73XX_MAC_CFG_100_BASE_T (1 << 13) -#define VSC73XX_MAC_CFG_TX_IPG(x) (((x) & 0x1f) << 6) -#define VSC73XX_MAC_CFG_MAC_RX_RST (1 << 5) -#define VSC73XX_MAC_CFG_MAC_TX_RST (1 << 4) -#define VSC73XX_MAC_CFG_BIT2 (1 << 2) -#define VSC73XX_MAC_CFG_CLK_SEL(x) ((x) & 0x3) - -/* ADVPORTM register bits */ -#define VSC73XX_ADVPORTM_IFG_PPM (1 << 7) -#define VSC73XX_ADVPORTM_EXC_COL_CONT (1 << 6) -#define VSC73XX_ADVPORTM_EXT_PORT (1 << 5) -#define VSC73XX_ADVPORTM_INV_GTX (1 << 4) -#define VSC73XX_ADVPORTM_ENA_GTX (1 << 3) -#define VSC73XX_ADVPORTM_DDR_MODE (1 << 2) -#define VSC73XX_ADVPORTM_IO_LOOPBACK (1 << 1) -#define VSC73XX_ADVPORTM_HOST_LOOPBACK (1 << 0) - -/* MII Block registers */ -#define VSC73XX_MII_STAT 0x0 -#define VSC73XX_MII_CMD 0x1 -#define VSC73XX_MII_DATA 0x2 - -/* System Block registers */ -#define VSC73XX_ICPU_SIPAD 0x01 -#define VSC73XX_ICPU_CLOCK_DELAY 0x05 -#define VSC73XX_ICPU_CTRL 0x10 -#define VSC73XX_ICPU_ADDR 0x11 -#define VSC73XX_ICPU_SRAM 0x12 -#define VSC73XX_ICPU_MBOX_VAL 0x15 -#define VSC73XX_ICPU_MBOX_SET 0x16 -#define VSC73XX_ICPU_MBOX_CLR 0x17 -#define VSC73XX_ICPU_CHIPID 0x18 -#define VSC73XX_ICPU_GPIO 0x34 - -#define VSC73XX_ICPU_CTRL_CLK_DIV (1 << 8) -#define VSC73XX_ICPU_CTRL_SRST_HOLD (1 << 7) -#define VSC73XX_ICPU_CTRL_BOOT_EN (1 << 3) -#define VSC73XX_ICPU_CTRL_EXT_ACC_EN (1 << 2) -#define VSC73XX_ICPU_CTRL_CLK_EN (1 << 1) -#define VSC73XX_ICPU_CTRL_SRST (1 << 0) - -#define VSC73XX_ICPU_CHIPID_ID_SHIFT 12 -#define VSC73XX_ICPU_CHIPID_ID_MASK 0xffff -#define VSC73XX_ICPU_CHIPID_REV_SHIFT 28 -#define VSC73XX_ICPU_CHIPID_REV_MASK 0xf -#define VSC73XX_ICPU_CHIPID_ID_7385 0x7385 -#define VSC73XX_ICPU_CHIPID_ID_7395 0x7395 - -#define VSC73XX_CMD_MODE_READ 0 -#define VSC73XX_CMD_MODE_WRITE 1 -#define VSC73XX_CMD_MODE_SHIFT 4 -#define VSC73XX_CMD_BLOCK_SHIFT 5 -#define VSC73XX_CMD_BLOCK_MASK 0x7 -#define VSC73XX_CMD_SUBBLOCK_MASK 0xf - -#define VSC7385_CLOCK_DELAY ((3 << 4) | 3) -#define VSC7385_CLOCK_DELAY_MASK ((3 << 4) | 3) - -#define VSC73XX_ICPU_CTRL_STOP (VSC73XX_ICPU_CTRL_SRST_HOLD | \ - VSC73XX_ICPU_CTRL_BOOT_EN | \ - VSC73XX_ICPU_CTRL_EXT_ACC_EN) - -#define VSC73XX_ICPU_CTRL_START (VSC73XX_ICPU_CTRL_CLK_DIV | \ - VSC73XX_ICPU_CTRL_BOOT_EN | \ - VSC73XX_ICPU_CTRL_CLK_EN | \ - VSC73XX_ICPU_CTRL_SRST) - -#define VSC7385_ADVPORTM_MASK (VSC73XX_ADVPORTM_IFG_PPM | \ - VSC73XX_ADVPORTM_EXC_COL_CONT | \ - VSC73XX_ADVPORTM_EXT_PORT | \ - VSC73XX_ADVPORTM_INV_GTX | \ - VSC73XX_ADVPORTM_ENA_GTX | \ - VSC73XX_ADVPORTM_DDR_MODE | \ - VSC73XX_ADVPORTM_IO_LOOPBACK | \ - VSC73XX_ADVPORTM_HOST_LOOPBACK) - -#define VSC7385_ADVPORTM_INIT (VSC73XX_ADVPORTM_EXT_PORT | \ - VSC73XX_ADVPORTM_ENA_GTX | \ - VSC73XX_ADVPORTM_DDR_MODE) - -#define VSC7385_MAC_CFG_RESET (VSC73XX_MAC_CFG_PORT_RST | \ - VSC73XX_MAC_CFG_MAC_RX_RST | \ - VSC73XX_MAC_CFG_MAC_TX_RST) - -#define VSC73XX_MAC_CFG_INIT (VSC73XX_MAC_CFG_TX_EN | \ - VSC73XX_MAC_CFG_FDX | \ - VSC73XX_MAC_CFG_GIGE | \ - VSC73XX_MAC_CFG_RX_EN) - -#define VSC73XX_RESET_DELAY 100 - -struct vsc7385 { - struct spi_device *spi; - struct mutex lock; - struct vsc7385_platform_data *pdata; -}; - -static int vsc7385_is_addr_valid(u8 block, u8 subblock) -{ - switch (block) { - case VSC73XX_BLOCK_MAC: - switch (subblock) { - case 0 ... 4: - case 6: - return 1; - } - break; - - case VSC73XX_BLOCK_2: - case VSC73XX_BLOCK_SYSTEM: - switch (subblock) { - case 0: - return 1; - } - break; - - case VSC73XX_BLOCK_MII: - case VSC73XX_BLOCK_4: - case VSC73XX_BLOCK_5: - switch (subblock) { - case 0 ... 1: - return 1; - } - break; - } - - return 0; -} - -static inline u8 vsc7385_make_addr(u8 mode, u8 block, u8 subblock) -{ - u8 ret; - - ret = (block & VSC73XX_CMD_BLOCK_MASK) << VSC73XX_CMD_BLOCK_SHIFT; - ret |= (mode & 1) << VSC73XX_CMD_MODE_SHIFT; - ret |= subblock & VSC73XX_CMD_SUBBLOCK_MASK; - - return ret; -} - -static int vsc7385_read(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, - u32 *value) -{ - u8 cmd[4]; - u8 buf[4]; - struct spi_transfer t[2]; - struct spi_message m; - int err; - - if (!vsc7385_is_addr_valid(block, subblock)) - return -EINVAL; - - spi_message_init(&m); - - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - t[1].rx_buf = buf; - t[1].len = sizeof(buf); - spi_message_add_tail(&t[1], &m); - - cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_READ, block, subblock); - cmd[1] = reg; - cmd[2] = 0; - cmd[3] = 0; - - mutex_lock(&vsc->lock); - err = spi_sync(vsc->spi, &m); - mutex_unlock(&vsc->lock); - - if (err) - return err; - - *value = (((u32) buf[0]) << 24) | (((u32) buf[1]) << 16) | - (((u32) buf[2]) << 8) | ((u32) buf[3]); - - return 0; -} - - -static int vsc7385_write(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, - u32 value) -{ - u8 cmd[2]; - u8 buf[4]; - struct spi_transfer t[2]; - struct spi_message m; - int err; - - if (!vsc7385_is_addr_valid(block, subblock)) - return -EINVAL; - - spi_message_init(&m); - - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - t[1].tx_buf = buf; - t[1].len = sizeof(buf); - spi_message_add_tail(&t[1], &m); - - cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_WRITE, block, subblock); - cmd[1] = reg; - - buf[0] = (value >> 24) & 0xff; - buf[1] = (value >> 16) & 0xff; - buf[2] = (value >> 8) & 0xff; - buf[3] = value & 0xff; - - mutex_lock(&vsc->lock); - err = spi_sync(vsc->spi, &m); - mutex_unlock(&vsc->lock); - - return err; -} - -static inline int vsc7385_write_verify(struct vsc7385 *vsc, u8 block, - u8 subblock, u8 reg, u32 value, - u32 read_mask, u32 read_val) -{ - struct spi_device *spi = vsc->spi; - u32 t; - int err; - - err = vsc7385_write(vsc, block, subblock, reg, value); - if (err) - return err; - - err = vsc7385_read(vsc, block, subblock, reg, &t); - if (err) - return err; - - if ((t & read_mask) != read_val) { - dev_err(&spi->dev, "register write error\n"); - return -EIO; - } - - return 0; -} - -static inline int vsc7385_set_clock_delay(struct vsc7385 *vsc, u32 val) -{ - return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CLOCK_DELAY, val); -} - -static inline int vsc7385_get_clock_delay(struct vsc7385 *vsc, u32 *val) -{ - return vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CLOCK_DELAY, val); -} - -static inline int vsc7385_icpu_stop(struct vsc7385 *vsc) -{ - return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, - VSC73XX_ICPU_CTRL_STOP); -} - -static inline int vsc7385_icpu_start(struct vsc7385 *vsc) -{ - return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, - VSC73XX_ICPU_CTRL_START); -} - -static inline int vsc7385_icpu_reset(struct vsc7385 *vsc) -{ - int rc; - - rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_ADDR, - 0x0000); - if (rc) - dev_err(&vsc->spi->dev, - "could not reset microcode, err=%d\n", rc); - - return rc; -} - -static int vsc7385_upload_ucode(struct vsc7385 *vsc) -{ - struct spi_device *spi = vsc->spi; - const struct firmware *firmware; - char *ucode_name; - unsigned char *dp; - unsigned int curVal; - int i; - int diffs; - int rc; - - ucode_name = (vsc->pdata->ucode_name) ? vsc->pdata->ucode_name - : "vsc7385_ucode.bin"; - rc = request_firmware(&firmware, ucode_name, &spi->dev); - if (rc) { - dev_err(&spi->dev, "request_firmware failed, err=%d\n", - rc); - return rc; - } - - rc = vsc7385_icpu_stop(vsc); - if (rc) - goto out; - - rc = vsc7385_icpu_reset(vsc); - if (rc) - goto out; - - dev_info(&spi->dev, "uploading microcode...\n"); - - dp = (unsigned char *) firmware->data; - for (i = 0; i < firmware->size; i++) { - rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_SRAM, *dp++); - if (rc) { - dev_err(&spi->dev, "could not load microcode, err=%d\n", - rc); - goto out; - } - } - - rc = vsc7385_icpu_reset(vsc); - if (rc) - goto out; - - dev_info(&spi->dev, "verifying microcode...\n"); - - dp = (unsigned char *) firmware->data; - diffs = 0; - for (i = 0; i < firmware->size; i++) { - rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_SRAM, &curVal); - if (rc) { - dev_err(&spi->dev, "could not read microcode %d\n", - rc); - goto out; - } - - if (curVal > 0xff) { - dev_err(&spi->dev, "bad val read: %04x : %02x %02x\n", - i, *dp, curVal); - rc = -EIO; - goto out; - } - - if ((curVal & 0xff) != *dp) { - diffs++; - dev_err(&spi->dev, "verify error: %04x : %02x %02x\n", - i, *dp, curVal); - - if (diffs > 4) - break; - } - dp++; - } - - if (diffs) { - dev_err(&spi->dev, "microcode verification failed\n"); - rc = -EIO; - goto out; - } - - dev_info(&spi->dev, "microcode uploaded\n"); - - rc = vsc7385_icpu_start(vsc); - -out: - release_firmware(firmware); - return rc; -} - -static int vsc7385_setup(struct vsc7385 *vsc) -{ - struct vsc7385_platform_data *pdata = vsc->pdata; - u32 t; - int err; - - err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CLOCK_DELAY, - VSC7385_CLOCK_DELAY, - VSC7385_CLOCK_DELAY_MASK, - VSC7385_CLOCK_DELAY); - if (err) - goto err; - - err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_MAC, - VSC73XX_SUBBLOCK_PORT_MAC, VSC73XX_ADVPORTM, - VSC7385_ADVPORTM_INIT, - VSC7385_ADVPORTM_MASK, - VSC7385_ADVPORTM_INIT); - if (err) - goto err; - - err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, - VSC73XX_MAC_CFG, VSC7385_MAC_CFG_RESET); - if (err) - goto err; - - t = VSC73XX_MAC_CFG_INIT; - t |= VSC73XX_MAC_CFG_TX_IPG(pdata->mac_cfg.tx_ipg); - t |= VSC73XX_MAC_CFG_CLK_SEL(pdata->mac_cfg.clk_sel); - if (pdata->mac_cfg.bit2) - t |= VSC73XX_MAC_CFG_BIT2; - - err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, - VSC73XX_MAC_CFG, t); - if (err) - goto err; - - return 0; - -err: - return err; -} - -static int vsc7385_detect(struct vsc7385 *vsc) -{ - struct spi_device *spi = vsc->spi; - u32 t; - u32 id; - u32 rev; - int err; - - err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_MBOX_VAL, &t); - if (err) { - dev_err(&spi->dev, "unable to read mailbox, err=%d\n", err); - return err; - } - - if (t == 0xffffffff) { - dev_dbg(&spi->dev, "assert chip reset\n"); - if (vsc->pdata->reset) - vsc->pdata->reset(); - - } - - err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CHIPID, &t); - if (err) { - dev_err(&spi->dev, "unable to read chip id, err=%d\n", err); - return err; - } - - id = (t >> VSC73XX_ICPU_CHIPID_ID_SHIFT) & VSC73XX_ICPU_CHIPID_ID_MASK; - switch (id) { - case VSC73XX_ICPU_CHIPID_ID_7385: - case VSC73XX_ICPU_CHIPID_ID_7395: - break; - default: - dev_err(&spi->dev, "unsupported chip, id=%04x\n", id); - return -ENODEV; - } - - rev = (t >> VSC73XX_ICPU_CHIPID_REV_SHIFT) & - VSC73XX_ICPU_CHIPID_REV_MASK; - dev_info(&spi->dev, "VSC%04X (rev. %d) switch found\n", id, rev); - - return 0; -} - -static int vsc7385_probe(struct spi_device *spi) -{ - struct vsc7385 *vsc; - struct vsc7385_platform_data *pdata; - int err; - - printk(KERN_INFO DRV_DESC " version " DRV_VERSION"\n"); - - pdata = spi->dev.platform_data; - if (!pdata) { - dev_err(&spi->dev, "no platform data specified\n"); - return -ENODEV; - } - - vsc = kzalloc(sizeof(*vsc), GFP_KERNEL); - if (!vsc) { - dev_err(&spi->dev, "no memory for private data\n"); - return -ENOMEM; - } - - mutex_init(&vsc->lock); - vsc->pdata = pdata; - vsc->spi = spi_dev_get(spi); - dev_set_drvdata(&spi->dev, vsc); - - spi->mode = SPI_MODE_0; - spi->bits_per_word = 8; - err = spi_setup(spi); - if (err) { - dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); - goto err_drvdata; - } - - err = vsc7385_detect(vsc); - if (err) { - dev_err(&spi->dev, "no chip found, err=%d\n", err); - goto err_drvdata; - } - - err = vsc7385_upload_ucode(vsc); - if (err) - goto err_drvdata; - - err = vsc7385_setup(vsc); - if (err) - goto err_drvdata; - - return 0; - -err_drvdata: - dev_set_drvdata(&spi->dev, NULL); - kfree(vsc); - return err; -} - -static int vsc7385_remove(struct spi_device *spi) -{ - struct vsc7385_data *vsc; - - vsc = dev_get_drvdata(&spi->dev); - dev_set_drvdata(&spi->dev, NULL); - kfree(vsc); - - return 0; -} - -static struct spi_driver vsc7385_driver = { - .driver = { - .name = DRV_NAME, - .bus = &spi_bus_type, - .owner = THIS_MODULE, - }, - .probe = vsc7385_probe, - .remove = vsc7385_remove, -}; - -static int __init vsc7385_init(void) -{ - return spi_register_driver(&vsc7385_driver); -} -module_init(vsc7385_init); - -static void __exit vsc7385_exit(void) -{ - spi_unregister_driver(&vsc7385_driver); -} -module_exit(vsc7385_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); - |