diff options
Diffstat (limited to 'target/linux/ar7')
11 files changed, 666 insertions, 0 deletions
diff --git a/target/linux/ar7/config-2.6.37 b/target/linux/ar7/config-2.6.37 new file mode 100644 index 0000000..7217c24 --- /dev/null +++ b/target/linux/ar7/config-2.6.37 @@ -0,0 +1,160 @@ +CONFIG_32BIT=y +# CONFIG_64BIT is not set +CONFIG_ADM6996_PHY=y +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set +CONFIG_AR7=y +CONFIG_AR7_GPIO=y +CONFIG_AR7_WDT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_ARCH_SUPPORTS_OPROFILE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_BCM47XX is not set +# CONFIG_BCM63XX is not set +CONFIG_BITREVERSE=y +CONFIG_BOOT_ELF32=y +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +CONFIG_CEVT_R4K=y +CONFIG_CEVT_R4K_LIB=y +CONFIG_CPMAC=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_CAVIUM_OCTEON is not set +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_CPU_LOONGSON2E is not set +# CONFIG_CPU_LOONGSON2F is not set +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +CONFIG_CPU_MIPSR1=y +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_VR41XX is not set +CONFIG_CSRC_R4K=y +CONFIG_CSRC_R4K_LIB=y +CONFIG_DECOMPRESS_LZMA=y +# CONFIG_DM9000 is not set +CONFIG_DMA_NONCOHERENT=y +CONFIG_EARLY_PRINTK=y +CONFIG_FIXED_PHY=y +# CONFIG_FSNOTIFY is not set +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_GPIOLIB=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_KERNEL_BZIP2=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HW_RANDOM=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IP17XX_PHY=y +CONFIG_IRQ_CPU=y +CONFIG_KALLSYMS=y +CONFIG_LEDS_GPIO=y +# CONFIG_LOONGSON_MC146818 is not set +CONFIG_LOONGSON_UART_BASE=y +# CONFIG_MACH_ALCHEMY is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_MACH_LOONGSON is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_MIKROTIK_RB532 is not set +CONFIG_MIPS=y +# CONFIG_MIPS_COBALT is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_MACHINE is not set +# CONFIG_MIPS_MALTA is not set +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_SIM is not set +CONFIG_MTD_AR7_PARTS=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MVSWITCH_PHY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NO_EXCEPT_FILL=y +# CONFIG_NO_IOPORT is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_PHYLIB=y +# CONFIG_PMC_MSP is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_POWERTV is not set +CONFIG_SCHED_OMIT_FRAME_POINTER=y +# CONFIG_SCSI_DMA is not set +CONFIG_SCSI_MOD=y +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP28 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_SWARM is not set +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWCONFIG=y +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y +# CONFIG_TINY_RCU is not set +CONFIG_TRAD_SIGNALS=y +CONFIG_TREE_RCU=y +CONFIG_VLYNQ=y +CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/ar7/patches-2.6.37/110-flash.patch b/target/linux/ar7/patches-2.6.37/110-flash.patch new file mode 100644 index 0000000..0d14c97 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/110-flash.patch @@ -0,0 +1,11 @@ +--- a/drivers/mtd/maps/physmap.c ++++ b/drivers/mtd/maps/physmap.c +@@ -79,7 +79,7 @@ static const char *rom_probe_types[] = { + "map_rom", + NULL }; + #ifdef CONFIG_MTD_PARTITIONS +-static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL }; ++static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL }; + #endif + + static int physmap_flash_probe(struct platform_device *dev) diff --git a/target/linux/ar7/patches-2.6.37/120-gpio_chrdev.patch b/target/linux/ar7/patches-2.6.37/120-gpio_chrdev.patch new file mode 100644 index 0000000..aba45c0 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/120-gpio_chrdev.patch @@ -0,0 +1,28 @@ +--- a/drivers/char/Kconfig ++++ b/drivers/char/Kconfig +@@ -990,6 +990,15 @@ config MWAVE + To compile this driver as a module, choose M here: the + module will be called mwave. + ++config AR7_GPIO ++ tristate "TI AR7 GPIO Support" ++ depends on AR7 ++ help ++ Give userspace access to the GPIO pins on the Texas Instruments AR7 ++ processors. ++ ++ If compiled as a module, it will be called ar7_gpio. ++ + config SCx200_GPIO + tristate "NatSemi SCx200 GPIO Support" + depends on SCx200 +--- a/drivers/char/Makefile ++++ b/drivers/char/Makefile +@@ -94,6 +94,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/ + obj-$(CONFIG_PPDEV) += ppdev.o + obj-$(CONFIG_NWBUTTON) += nwbutton.o + obj-$(CONFIG_NWFLASH) += nwflash.o ++obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o + obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o + obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o + obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o diff --git a/target/linux/ar7/patches-2.6.37/160-vlynq_try_remote_first.patch b/target/linux/ar7/patches-2.6.37/160-vlynq_try_remote_first.patch new file mode 100644 index 0000000..b98931e --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/160-vlynq_try_remote_first.patch @@ -0,0 +1,20 @@ +--- a/drivers/vlynq/vlynq.c ++++ b/drivers/vlynq/vlynq.c +@@ -515,9 +515,14 @@ static int __vlynq_enable_device(struct + !__vlynq_try_external(dev)) + return 0; + } else { +- if (!__vlynq_try_external(dev) || +- !__vlynq_try_local(dev) || +- !__vlynq_try_remote(dev)) ++ /* XXX: I don't really know what difference it makes, if the order ++ * of the following calls is changed, but at least in this order ++ * my fritzbox doesn't hang at startup as in ++ * https://dev.openwrt.org/ticket/7324 ++ */ ++ if (!__vlynq_try_remote(dev) || ++ !__vlynq_try_local(dev) || ++ !__vlynq_try_external(dev)) + return 0; + } + break; diff --git a/target/linux/ar7/patches-2.6.37/170-clocks_init_earlier.patch b/target/linux/ar7/patches-2.6.37/170-clocks_init_earlier.patch new file mode 100644 index 0000000..6f09317 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/170-clocks_init_earlier.patch @@ -0,0 +1,20 @@ +--- a/arch/mips/ar7/time.c ++++ b/arch/mips/ar7/time.c +@@ -33,6 +33,8 @@ void __init plat_time_init(void) + /* Initialize ar7 clocks so the CPU clock frequency is correct */ + ar7_init_clocks(); + ++ ar7_init_clocks(); ++ + cpu_clk = clk_get(NULL, "cpu"); + if (IS_ERR(cpu_clk)) { + printk(KERN_ERR "unable to get cpu clock\n"); +--- a/arch/mips/include/asm/mach-ar7/ar7.h ++++ b/arch/mips/include/asm/mach-ar7/ar7.h +@@ -203,4 +203,6 @@ static inline void ar7_device_off(u32 bi + int __init ar7_gpio_init(void); + void __init ar7_init_clocks(void); + ++extern void __init ar7_init_clocks(void); ++ + #endif /* __AR7_H__ */ diff --git a/target/linux/ar7/patches-2.6.37/500-serial_kludge.patch b/target/linux/ar7/patches-2.6.37/500-serial_kludge.patch new file mode 100644 index 0000000..b0eda47 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/500-serial_kludge.patch @@ -0,0 +1,28 @@ +--- a/drivers/serial/8250.c ++++ b/drivers/serial/8250.c +@@ -302,6 +302,13 @@ static const struct serial8250_config ua + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, + .flags = UART_CAP_FIFO | UART_CAP_AFE, + }, ++ [PORT_AR7] = { ++ .name = "TI-AR7", ++ .fifo_size = 16, ++ .tx_loadsz = 16, ++ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, ++ .flags = UART_CAP_FIFO | UART_CAP_AFE, ++ }, + }; + + #if defined(CONFIG_MIPS_ALCHEMY) +@@ -2773,7 +2780,11 @@ static void serial8250_console_putchar(s + { + struct uart_8250_port *up = (struct uart_8250_port *)port; + ++#ifdef CONFIG_AR7 ++ wait_for_xmitr(up, BOTH_EMPTY); ++#else + wait_for_xmitr(up, UART_LSR_THRE); ++#endif + serial_out(up, UART_TX, ch); + } + diff --git a/target/linux/ar7/patches-2.6.37/920-ar7part.patch b/target/linux/ar7/patches-2.6.37/920-ar7part.patch new file mode 100644 index 0000000..8495855 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/920-ar7part.patch @@ -0,0 +1,55 @@ +--- a/drivers/mtd/ar7part.c ++++ b/drivers/mtd/ar7part.c +@@ -27,12 +27,14 @@ + #include <linux/mtd/partitions.h> + #include <linux/bootmem.h> + #include <linux/magic.h> ++#include <asm/mach-ar7/prom.h> + + #define AR7_PARTS 4 + #define ROOT_OFFSET 0xe0000 + + #define LOADER_MAGIC1 le32_to_cpu(0xfeedfa42) + #define LOADER_MAGIC2 le32_to_cpu(0xfeed1281) ++#define LOADER_MAGIC3 le32_to_cpu(0x434d4d4c) + + #ifndef SQUASHFS_MAGIC + #define SQUASHFS_MAGIC 0x73717368 +@@ -44,6 +46,10 @@ struct ar7_bin_rec { + unsigned int address; + }; + ++int create_titan_partitions(struct mtd_info *master, ++ struct mtd_partition **pparts, ++ unsigned long origin); ++ + static int create_mtd_partitions(struct mtd_info *master, + struct mtd_partition **pparts, + unsigned long origin) +@@ -57,6 +63,16 @@ static int create_mtd_partitions(struct + int retries = 10; + struct mtd_partition *ar7_parts; + ++ const char *prod_id ; ++ prod_id = prom_getenv("ProductID"); ++ if(prod_id && ++ (strcmp(prod_id, "CYWL")==0 || ++ strcmp(prod_id, "CYWM")==0 || ++ strcmp(prod_id, "CYLM")==0 || ++ strcmp(prod_id, "CYLL")==0)){ ++ return create_titan_partitions(master, pparts, origin); ++ } ++ + ar7_parts = kzalloc(sizeof(*ar7_parts) * AR7_PARTS, GFP_KERNEL); + if (!ar7_parts) + return -ENOMEM; +--- a/drivers/mtd/Makefile ++++ b/drivers/mtd/Makefile +@@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_REDBOOT_PARTS) += redbo + obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o + obj-$(CONFIG_MTD_AFS_PARTS) += afs.o + obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o ++obj-$(CONFIG_MTD_AR7_PARTS) += titanpart.o + obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o + obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o + diff --git a/target/linux/ar7/patches-2.6.37/930-ar7_early_gpio_init.patch b/target/linux/ar7/patches-2.6.37/930-ar7_early_gpio_init.patch new file mode 100644 index 0000000..05eee04 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/930-ar7_early_gpio_init.patch @@ -0,0 +1,9 @@ +--- a/arch/mips/include/asm/mach-ar7/ar7.h ++++ b/arch/mips/include/asm/mach-ar7/ar7.h +@@ -205,4 +205,6 @@ void __init ar7_init_clocks(void); + + extern void __init ar7_init_clocks(void); + ++int __init ar7_gpio_init(void); ++ + #endif /* __AR7_H__ */ diff --git a/target/linux/ar7/patches-2.6.37/950-cpmac_titan.patch b/target/linux/ar7/patches-2.6.37/950-cpmac_titan.patch new file mode 100644 index 0000000..65a5b70 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/950-cpmac_titan.patch @@ -0,0 +1,49 @@ +--- a/drivers/net/cpmac.c ++++ b/drivers/net/cpmac.c +@@ -1155,6 +1155,8 @@ static int __devinit cpmac_probe(struct + goto fail; + } + ++ ar7_device_reset(pdata->reset_bit); ++ + dev->irq = platform_get_irq_byname(pdev, "irq"); + + dev->netdev_ops = &cpmac_netdev_ops; +@@ -1231,7 +1233,7 @@ int __devinit cpmac_init(void) + cpmac_mii->reset = cpmac_mdio_reset; + cpmac_mii->irq = mii_irqs; + +- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256); ++ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256); + + if (!cpmac_mii->priv) { + printk(KERN_ERR "Can't ioremap mdio registers\n"); +@@ -1242,10 +1244,16 @@ int __devinit cpmac_init(void) + #warning FIXME: unhardcode gpio&reset bits + ar7_gpio_disable(26); + ar7_gpio_disable(27); +- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO); +- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI); ++ ++ if (!ar7_is_titan()) { ++ ar7_device_reset(AR7_RESET_BIT_CPMAC_LO); ++ ar7_device_reset(AR7_RESET_BIT_CPMAC_HI); ++ } + ar7_device_reset(AR7_RESET_BIT_EPHY); + ++ if (ar7_is_titan()) ++ ar7_device_reset(TITAN_RESET_BIT_EPHY1); ++ + cpmac_mii->reset(cpmac_mii); + + for (i = 0; i < 300; i++) +@@ -1260,7 +1268,8 @@ int __devinit cpmac_init(void) + mask = 0; + } + +- cpmac_mii->phy_mask = ~(mask | 0x80000000); ++ cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000) : ++ ~(mask | 0x80000000); + snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1"); + + res = mdiobus_register(cpmac_mii); diff --git a/target/linux/ar7/patches-2.6.37/972-cpmac_fixup.patch b/target/linux/ar7/patches-2.6.37/972-cpmac_fixup.patch new file mode 100644 index 0000000..2f56615 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/972-cpmac_fixup.patch @@ -0,0 +1,216 @@ +--- a/arch/mips/ar7/platform.c ++++ b/arch/mips/ar7/platform.c +@@ -33,7 +33,6 @@ + #include <linux/string.h> + #include <linux/etherdevice.h> + #include <linux/phy.h> +-#include <linux/phy_fixed.h> + #include <linux/gpio.h> + #include <linux/clk.h> + +@@ -248,12 +247,6 @@ static struct resource cpmac_high_res[] + }, + }; + +-static struct fixed_phy_status fixed_phy_status __initdata = { +- .link = 1, +- .speed = 100, +- .duplex = 1, +-}; +- + static struct plat_cpmac_data cpmac_low_data = { + .reset_bit = 17, + .power_bit = 20, +@@ -643,26 +636,18 @@ static int __init ar7_register_devices(v + } + + if (ar7_has_high_cpmac()) { +- res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status); +- if (!res) { +- cpmac_get_mac(1, cpmac_high_data.dev_addr); +- +- res = platform_device_register(&cpmac_high); +- if (res) +- pr_warning("unable to register cpmac-high: %d\n", res); +- } else +- pr_warning("unable to add cpmac-high phy: %d\n", res); +- } else +- cpmac_low_data.phy_mask = 0xffffffff; ++ cpmac_get_mac(1, cpmac_high_data.dev_addr); + +- res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status); +- if (!res) { +- cpmac_get_mac(0, cpmac_low_data.dev_addr); +- res = platform_device_register(&cpmac_low); ++ res = platform_device_register(&cpmac_high); + if (res) +- pr_warning("unable to register cpmac-low: %d\n", res); ++ pr_warning("unable to register cpmac-high: %d\n", res); + } else +- pr_warning("unable to add cpmac-low phy: %d\n", res); ++ cpmac_low_data.phy_mask = 0xffffffff; ++ ++ cpmac_get_mac(0, cpmac_low_data.dev_addr); ++ res = platform_device_register(&cpmac_low); ++ if (res) ++ pr_warning("unable to register cpmac-low: %d\n", res); + + detect_leds(); + res = platform_device_register(&ar7_gpio_leds); +@@ -675,8 +660,10 @@ static int __init ar7_register_devices(v + + /* Register watchdog only if enabled in hardware */ + bootcr = ioremap_nocache(AR7_REGS_DCL, 4); +- val = readl(bootcr); +- iounmap(bootcr); ++ if (bootcr) { ++ val = readl(bootcr); ++ iounmap(bootcr); ++ } + if (val & AR7_WDT_HW_ENA) { + if (ar7_has_high_vlynq()) + ar7_wdt_res.start = UR8_REGS_WDT; +--- a/arch/mips/include/asm/mach-ar7/ar7.h ++++ b/arch/mips/include/asm/mach-ar7/ar7.h +@@ -42,6 +42,7 @@ + #define AR7_REGS_PINSEL (AR7_REGS_BASE + 0x160C) + #define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800) + #define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00) ++#define AR7_REGS_MII (AR7_REGS_BASE + 0x1a08) + #define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00) + #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00) + #define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400) +--- a/drivers/net/cpmac.c ++++ b/drivers/net/cpmac.c +@@ -34,7 +34,6 @@ + #include <linux/skbuff.h> + #include <linux/mii.h> + #include <linux/phy.h> +-#include <linux/phy_fixed.h> + #include <linux/platform_device.h> + #include <linux/dma-mapping.h> + #include <linux/clk.h> +@@ -47,14 +46,11 @@ MODULE_LICENSE("GPL"); + MODULE_ALIAS("platform:cpmac"); + + static int debug_level = 8; +-static int dumb_switch; + +-/* Next 2 are only used in cpmac_probe, so it's pointless to change them */ ++/* Next is only used in cpmac_probe, so it's pointless to change them */ + module_param(debug_level, int, 0444); +-module_param(dumb_switch, int, 0444); + + MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable"); +-MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus"); + + #define CPMAC_VERSION "0.5.2" + /* frame size + 802.1q tag + FCS size */ +@@ -673,9 +669,8 @@ static void cpmac_hw_start(struct net_de + for (i = 0; i < 8; i++) + cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]); + cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]); +- cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] | +- (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) | +- (dev->dev_addr[3] << 24)); ++ cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *) ++ dev->dev_addr)); + cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE); + cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff); + cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff); +@@ -1107,8 +1102,6 @@ static const struct net_device_ops cpmac + .ndo_set_mac_address = eth_mac_addr, + }; + +-static int external_switch; +- + static int __devinit cpmac_probe(struct platform_device *pdev) + { + int rc, phy_id; +@@ -1120,25 +1113,18 @@ static int __devinit cpmac_probe(struct + + pdata = pdev->dev.platform_data; + +- if (external_switch || dumb_switch) { +- strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */ +- phy_id = pdev->id; +- } else { +- for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) { +- if (!(pdata->phy_mask & (1 << phy_id))) +- continue; +- if (!cpmac_mii->phy_map[phy_id]) +- continue; +- strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE); +- break; +- } ++ for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) { ++ if (!(pdata->phy_mask & (1 << phy_id))) ++ continue; ++ if (!cpmac_mii->phy_map[phy_id]) ++ continue; ++ strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE); ++ break; + } + + if (phy_id == PHY_MAX_ADDR) { +- dev_err(&pdev->dev, "no PHY present, falling back " +- "to switch on MDIO bus 0\n"); +- strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */ +- phy_id = pdev->id; ++ printk(KERN_ERR "cpmac: No PHY present\n"); ++ return -ENXIO; + } + + dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES); +@@ -1227,6 +1213,7 @@ int __devinit cpmac_init(void) + { + u32 mask; + int i, res; ++ void __iomem *mii_reg; + + cpmac_mii = mdiobus_alloc(); + if (cpmac_mii == NULL) +@@ -1250,14 +1237,14 @@ int __devinit cpmac_init(void) + ar7_gpio_disable(26); + ar7_gpio_disable(27); + +- if (!ar7_is_titan()) { ++ if (ar7_is_titan()) { ++ ar7_device_reset(AR7_RESET_BIT_EPHY); ++ ar7_device_reset(TITAN_RESET_BIT_EPHY1); ++ } else { ++ ar7_device_reset(AR7_RESET_BIT_EPHY); + ar7_device_reset(AR7_RESET_BIT_CPMAC_LO); + ar7_device_reset(AR7_RESET_BIT_CPMAC_HI); + } +- ar7_device_reset(AR7_RESET_BIT_EPHY); +- +- if (ar7_is_titan()) +- ar7_device_reset(TITAN_RESET_BIT_EPHY1); + + cpmac_mii->reset(cpmac_mii); + +@@ -1269,10 +1256,20 @@ int __devinit cpmac_init(void) + msleep(10); + } + +- mask &= 0x7fffffff; ++ mask &= ar7_is_titan()? ~(0x80000000 | 0x40000000) : ~(0x80000000); + if (mask & (mask - 1)) { +- external_switch = 1; +- mask = 0; ++ if (ar7_is_titan()) { ++ ar7_device_disable(AR7_RESET_BIT_EPHY); ++ ar7_device_disable(TITAN_RESET_BIT_EPHY1); ++ } else ++ ar7_device_disable(AR7_RESET_BIT_EPHY); ++ ++ //Titan remap might be different ++ mii_reg = ioremap(AR7_REGS_MII, 4); ++ if (mii_reg) { ++ writel(readl(mii_reg) | 1, mii_reg); ++ iounmap(mii_reg); ++ } + } + + cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000) : diff --git a/target/linux/ar7/patches-2.6.37/973-cpmac_handle_mvswitch.patch b/target/linux/ar7/patches-2.6.37/973-cpmac_handle_mvswitch.patch new file mode 100644 index 0000000..78aafd6 --- /dev/null +++ b/target/linux/ar7/patches-2.6.37/973-cpmac_handle_mvswitch.patch @@ -0,0 +1,70 @@ +--- a/drivers/net/cpmac.c ++++ b/drivers/net/cpmac.c +@@ -372,6 +372,7 @@ static struct sk_buff *cpmac_rx_one(stru + struct cpmac_desc *desc) + { + struct sk_buff *skb, *result = NULL; ++ int offset; + + if (unlikely(netif_msg_hw(priv))) + cpmac_dump_desc(priv->dev, desc); +@@ -383,10 +384,15 @@ static struct sk_buff *cpmac_rx_one(stru + return NULL; + } + +- skb = netdev_alloc_skb_ip_align(priv->dev, CPMAC_SKB_SIZE); ++ skb = netdev_alloc_skb(priv->dev, CPMAC_SKB_SIZE); + if (likely(skb)) { ++ offset = 2; ++ if (priv->phy) { ++ offset += priv->phy->pkt_align; ++ } ++ skb_reserve(skb, offset); ++ + skb_put(desc->skb, desc->datalen); +- desc->skb->protocol = eth_type_trans(desc->skb, priv->dev); + skb_checksum_none_assert(desc->skb); + priv->dev->stats.rx_packets++; + priv->dev->stats.rx_bytes += desc->datalen; +@@ -458,7 +464,12 @@ static int cpmac_poll(struct napi_struct + + skb = cpmac_rx_one(priv, desc); + if (likely(skb)) { +- netif_receive_skb(skb); ++ if (priv->phy->netif_receive_skb) { ++ priv->phy->netif_receive_skb(skb); ++ } else { ++ skb->protocol = eth_type_trans(skb, priv->dev); ++ netif_receive_skb(skb); ++ } + received++; + } + desc = desc->next; +@@ -951,7 +962,7 @@ static void cpmac_adjust_link(struct net + + static int cpmac_open(struct net_device *dev) + { +- int i, size, res; ++ int i, size, res, offset; + struct cpmac_priv *priv = netdev_priv(dev); + struct resource *mem; + struct cpmac_desc *desc; +@@ -990,11 +1001,17 @@ static int cpmac_open(struct net_device + + priv->rx_head = &priv->desc_ring[CPMAC_QUEUES]; + for (i = 0, desc = priv->rx_head; i < priv->ring_size; i++, desc++) { +- skb = netdev_alloc_skb_ip_align(dev, CPMAC_SKB_SIZE); ++ skb = netdev_alloc_skb(dev, CPMAC_SKB_SIZE); + if (unlikely(!skb)) { + res = -ENOMEM; + goto fail_desc; + } ++ offset = 2; ++ if (priv->phy) { ++ offset += priv->phy->pkt_align; ++ } ++ skb_reserve(skb, offset); ++ + desc->skb = skb; + desc->data_mapping = dma_map_single(&dev->dev, skb->data, + CPMAC_SKB_SIZE, |