diff options
Diffstat (limited to 'target/linux/archs38')
| -rw-r--r-- | target/linux/archs38/Makefile | 26 | ||||
| -rw-r--r-- | target/linux/archs38/base-files.mk | 3 | ||||
| -rwxr-xr-x | target/linux/archs38/base-files/etc/board.d/02_network | 19 | ||||
| -rw-r--r-- | target/linux/archs38/base-files/lib/arc.sh | 50 | ||||
| -rw-r--r-- | target/linux/archs38/base-files/lib/preinit/01_preinit_arc.sh | 9 | ||||
| -rw-r--r-- | target/linux/archs38/config-4.4 | 183 | ||||
| -rw-r--r-- | target/linux/archs38/dts/axc003_idu.dtsi | 126 | ||||
| -rw-r--r-- | target/linux/archs38/dts/axs103_idu.dts | 25 | ||||
| -rw-r--r-- | target/linux/archs38/dts/axs10x_mb.dtsi | 225 | ||||
| -rw-r--r-- | target/linux/archs38/dts/nsim_hs_idu.dts | 73 | ||||
| -rw-r--r-- | target/linux/archs38/dts/skeleton.dtsi | 37 | ||||
| -rw-r--r-- | target/linux/archs38/generic/profiles/00-default.mk | 16 | ||||
| -rw-r--r-- | target/linux/archs38/generic/profiles/01-minimal.mk | 15 | ||||
| -rw-r--r-- | target/linux/archs38/generic/profiles/02-axs103.mk | 16 | ||||
| -rw-r--r-- | target/linux/archs38/generic/profiles/03-nsim_hs.mk | 15 | ||||
| -rw-r--r-- | target/linux/archs38/generic/target.mk | 8 | ||||
| -rw-r--r-- | target/linux/archs38/image/Makefile | 41 |
17 files changed, 887 insertions, 0 deletions
diff --git a/target/linux/archs38/Makefile b/target/linux/archs38/Makefile new file mode 100644 index 0000000..166d3d5 --- /dev/null +++ b/target/linux/archs38/Makefile @@ -0,0 +1,26 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk + +ARCH:=arc +CPU_TYPE:=archs +BOARD:=archs38 +BOARDNAME:=Synopsys DesignWare ARC HS38 +MAINTAINER:=Alexey Brodkin <abrodkin@synopsys.com> +SUBTARGETS:=generic + +KERNEL_PATCHVER:=4.4 + +DEVICE_TYPE:=developerboard + +include $(INCLUDE_DIR)/target.mk + +define Target/Description + Synopsys DesignWare boards +endef + +$(eval $(call BuildTarget)) diff --git a/target/linux/archs38/base-files.mk b/target/linux/archs38/base-files.mk new file mode 100644 index 0000000..fdd2c71 --- /dev/null +++ b/target/linux/archs38/base-files.mk @@ -0,0 +1,3 @@ +define Package/base-files/install-target + rm -f $(1)/etc/config/network +endef diff --git a/target/linux/archs38/base-files/etc/board.d/02_network b/target/linux/archs38/base-files/etc/board.d/02_network new file mode 100755 index 0000000..da86ee0 --- /dev/null +++ b/target/linux/archs38/base-files/etc/board.d/02_network @@ -0,0 +1,19 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +. /lib/arc.sh +. /lib/functions/uci-defaults.sh + +board_config_update + +case "$( arc_board_name )" in +"arc-sdp"*) + ucidef_set_interface_lan "eth0" "dhcp" + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/archs38/base-files/lib/arc.sh b/target/linux/archs38/base-files/lib/arc.sh new file mode 100644 index 0000000..99d0077 --- /dev/null +++ b/target/linux/archs38/base-files/lib/arc.sh @@ -0,0 +1,50 @@ +#!/bin/sh +# +# Copyright (C) 2016 OpenWrt.org +# + +# defaults +ARC_BOARD_NAME="generic" +ARC_BOARD_MODEL="Generic ARC board" + +arc_board_detect() { + local board + local model + local compatible + + [ -e "/tmp/sysinfo/" ] || mkdir -p "/tmp/sysinfo/" + + model="$( cat /proc/device-tree/model )" + compatible="$( cat /proc/device-tree/compatible )" + + case "$compatible" in + "snps,axs103""snps,arc-sdp") + board="arc-sdp"; + ;; + "snps,nsim_hs") + board="arc-nsim"; + ;; + esac + + if [ "$board" != "" ]; then + ARC_BOARD_NAME="$board" + fi + + if [ "$model" != "" ]; then + ARC_BOARD_MODEL="$model" + fi + + echo "$ARC_BOARD_NAME" > /tmp/sysinfo/board_name + echo "$ARC_BOARD_MODEL" > /tmp/sysinfo/model + echo "Detected $ARC_BOARD_NAME // $ARC_BOARD_MODEL" +} + +arc_board_name() { + local name + + [ -f /tmp/sysinfo/board_name ] && name="$(cat /tmp/sysinfo/board_name)" + [ -z "$name" ] && name="unknown" + + echo "$name" +} + diff --git a/target/linux/archs38/base-files/lib/preinit/01_preinit_arc.sh b/target/linux/archs38/base-files/lib/preinit/01_preinit_arc.sh new file mode 100644 index 0000000..192c91b --- /dev/null +++ b/target/linux/archs38/base-files/lib/preinit/01_preinit_arc.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +do_arc() { + . /lib/arc.sh + + arc_board_detect +} + +boot_hook_add preinit_main do_arc diff --git a/target/linux/archs38/config-4.4 b/target/linux/archs38/config-4.4 new file mode 100644 index 0000000..9ea33c6 --- /dev/null +++ b/target/linux/archs38/config-4.4 @@ -0,0 +1,183 @@ +# CONFIG_16KSTACKS is not set +CONFIG_ARC=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set +# CONFIG_ARCH_HAS_SG_CHAIN is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARC_BUILTIN_DTB_NAME="" +CONFIG_ARC_CACHE=y +CONFIG_ARC_CACHE_LINE_SHIFT=6 +CONFIG_ARC_CACHE_PAGES=y +# CONFIG_ARC_CANT_LLSC is not set +CONFIG_ARC_CPU_HS=y +CONFIG_ARC_CURR_IN_REG=y +CONFIG_ARC_DBG=y +# CONFIG_ARC_DBG_TLB_MISS_COUNT is not set +# CONFIG_ARC_DBG_TLB_PARANOIA is not set +CONFIG_ARC_DW2_UNWIND=y +CONFIG_ARC_HAS_COH_CACHES=y +CONFIG_ARC_HAS_DCACHE=y +# CONFIG_ARC_HAS_DCCM is not set +CONFIG_ARC_HAS_DIV_REM=y +CONFIG_ARC_HAS_GRTC=y +CONFIG_ARC_HAS_HW_MPY=y +CONFIG_ARC_HAS_ICACHE=y +# CONFIG_ARC_HAS_ICCM is not set +CONFIG_ARC_HAS_LL64=y +CONFIG_ARC_HAS_LLSC=y +# CONFIG_ARC_HAS_PAE40 is not set +# CONFIG_ARC_HAS_REENTRANT_IRQ_LV2 is not set +CONFIG_ARC_HAS_SWAPE=y +# CONFIG_ARC_IPI_DBG is not set +CONFIG_ARC_MCIP=y +# CONFIG_ARC_METAWARE_HLINK is not set +CONFIG_ARC_MMU_V4=y +CONFIG_ARC_NUMBER_OF_INTERRUPTS=32 +# CONFIG_ARC_PAGE_SIZE_16K is not set +# CONFIG_ARC_PAGE_SIZE_4K is not set +CONFIG_ARC_PAGE_SIZE_8K=y +CONFIG_ARC_PLAT_AXS10X=y +CONFIG_ARC_PLAT_SIM=y +# CONFIG_ARC_PLAT_TB10X is not set +# CONFIG_ARC_SMP_HALT_ON_RESET is not set +CONFIG_ARC_STAR_9000923308=y +# CONFIG_ARC_UBOOT_SUPPORT is not set +CONFIG_AXS103=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_RMAP=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DTC=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_SUNXI is not set +CONFIG_DW_APB_ICTL=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +# CONFIG_GEN_RTC is not set +CONFIG_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_GPIO_DWAPB=y +CONFIG_GPIO_GENERIC=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_DEBUG_STACKOVERFLOW=y +CONFIG_HAVE_FUTEX_CMPXCHG=y +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_HAVE_IOREMAP_PROT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_WORK=y +# CONFIG_ISA_ARCOMPACT is not set +CONFIG_ISA_ARCV2=y +CONFIG_KALLSYMS=y +CONFIG_LIBFDT=y +CONFIG_LINUX_LINK_BASE=0x80000000 +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BOARDINFO=y +CONFIG_MFD_SYSCON=y +CONFIG_MMC=y +CONFIG_MMC_DW=y +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_K3 is not set +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NATIONAL_PHY=y +# CONFIG_NET_CADENCE is not set +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_NO_BOOTMEM=y +CONFIG_NO_IOPORT_MAP=y +CONFIG_NR_CPUS=4 +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_MTD=y +CONFIG_OF_NET=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PPS=y +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_RCU=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_RATIONAL=y +# CONFIG_RCU_BOOST is not set +CONFIG_RCU_STALL_COMMON=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_RTC is not set +# CONFIG_SCHED_INFO is not set +# CONFIG_SCSI_DMA is not set +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_FSL is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_ARC=y +CONFIG_SERIAL_ARC_CONSOLE=y +CONFIG_SERIAL_ARC_NR_PORTS=1 +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SMP=y +CONFIG_SRCU=y +CONFIG_STACKTRACE=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_SUNXI_SRAM is not set +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_USB_SUPPORT=y +CONFIG_XPS=y +CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/archs38/dts/axc003_idu.dtsi b/target/linux/archs38/dts/axc003_idu.dtsi new file mode 100644 index 0000000..06a9f29 --- /dev/null +++ b/target/linux/archs38/dts/axc003_idu.dtsi @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc + */ + +/ { + compatible = "snps,arc"; + clock-frequency = <90000000>; + #address-cells = <1>; + #size-cells = <1>; + + cpu_card { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x00000000 0xf0000000 0x10000000>; + + cpu_intc: archs-intc@cpu { + compatible = "snps,archs-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + + idu_intc: idu-interrupt-controller { + compatible = "snps,archs-idu-intc"; + interrupt-controller; + interrupt-parent = <&cpu_intc>; + + /* + * <hwirq distribution> + * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 + */ + #interrupt-cells = <2>; + + /* + * upstream irqs to core intc - downstream these are + * "COMMON" irq 0,1.. + */ + interrupts = <24 25>; + }; + + /* + * this GPIO block ORs all interrupts on CPU card (creg,..) + * to uplink only 1 IRQ to ARC core intc + */ + dw-apb-gpio@0x2000 { + compatible = "snps,dw-apb-gpio"; + reg = < 0x2000 0x80 >; + #address-cells = <1>; + #size-cells = <0>; + + ictl_intc: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <30>; + reg = <0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&idu_intc>; + + /* + * cmn irq 1 -> cpu irq 25 + * Distribute to cpu0 only + */ + interrupts = <1 1>; + }; + }; + + debug_uart: dw-apb-uart@0x5000 { + compatible = "snps,dw-apb-uart"; + reg = <0x5000 0x100>; + clock-frequency = <33333000>; + interrupt-parent = <&ictl_intc>; + interrupts = <2 4>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + arcpct0: pct { + compatible = "snps,archs-pct"; + #interrupt-cells = <1>; + interrupt-parent = <&cpu_intc>; + interrupts = <20>; + }; + }; + + /* + * This INTC is actually connected to DW APB GPIO + * which acts as a wire between MB INTC and CPU INTC. + * GPIO INTC is configured in platform init code + * and here we mimic direct connection from MB INTC to + * CPU INTC, thus we set "interrupts = <0 1>" instead of + * "interrupts = <12>" + * + * This intc actually resides on MB, but we move it here to + * avoid duplicating the MB dtsi file given that IRQ from + * this intc to cpu intc are different for axs101 and axs103 + */ + mb_intc: dw-apb-ictl@0xe0012000 { + #interrupt-cells = <1>; + compatible = "snps,dw-apb-ictl"; + reg = < 0xe0012000 0x200 >; + interrupt-controller; + interrupt-parent = <&idu_intc>; + interrupts = <0 1>; /* cmn irq 0 -> cpu irq 24 + distribute to cpu0 only */ + }; + + memory { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x80000000 0x40000000>; + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512MiB */ + }; +}; diff --git a/target/linux/archs38/dts/axs103_idu.dts b/target/linux/archs38/dts/axs103_idu.dts new file mode 100644 index 0000000..9c4bf0f --- /dev/null +++ b/target/linux/archs38/dts/axs103_idu.dts @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Device Tree for AXS103 SDP with AXS10X Main Board and + * AXC003 FPGA Card (with SMP bitfile) + */ +/dts-v1/; + +/include/ "axc003_idu.dtsi" +/include/ "axs10x_mb.dtsi" + +/ { + model = "Synopsys AXS103 Development Board"; + compatible = "snps,axs103", "snps,arc-sdp"; + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8"; + }; +}; diff --git a/target/linux/archs38/dts/axs10x_mb.dtsi b/target/linux/archs38/dts/axs10x_mb.dtsi new file mode 100644 index 0000000..44a578c --- /dev/null +++ b/target/linux/archs38/dts/axs10x_mb.dtsi @@ -0,0 +1,225 @@ +/* + * Support for peripherals on the AXS10x mainboard + * + * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + axs10x_mb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0xe0000000 0x10000000>; + interrupt-parent = <&mb_intc>; + + clocks { + i2cclk: i2cclk { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + + apbclk: apbclk { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + + mmcclk: mmcclk { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + }; + + ethernet@0x18000 { + #interrupt-cells = <1>; + compatible = "snps,dwmac"; + reg = < 0x18000 0x2000 >; + interrupts = < 4 >; + interrupt-names = "macirq"; + phy-mode = "rgmii"; + snps,pbl = < 32 >; + clocks = <&apbclk>; + clock-names = "stmmaceth"; + max-speed = <100>; + }; + + ehci@0x40000 { + compatible = "generic-ehci"; + reg = < 0x40000 0x100 >; + interrupts = < 8 >; + }; + + ohci@0x60000 { + compatible = "generic-ohci"; + reg = < 0x60000 0x100 >; + interrupts = < 8 >; + }; + + /* + * According to DW Mobile Storage databook it is required + * to use "Hold Register" if card is enumerated in SDR12 or + * SDR25 modes. + * + * Utilization of "Hold Register" is already implemented via + * dw_mci_pltfm_prepare_command() which in its turn gets + * used through dw_mci_drv_data->prepare_command call-back. + * This call-back is used in Altera Socfpga platform and so + * we may reuse it saying that we're compatible with their + * "altr,socfpga-dw-mshc". + * + * Most probably "Hold Register" utilization is platform- + * independent requirement which means that single unified + * "snps,dw-mshc" should be enough for all users of DW MMC once + * dw_mci_pltfm_prepare_command() is used in generic platform + * code. + */ + mmc@0x15000 { + compatible = "altr,socfpga-dw-mshc"; + reg = < 0x15000 0x400 >; + num-slots = < 1 >; + fifo-depth = < 16 >; + card-detect-delay = < 200 >; + clocks = <&apbclk>, <&mmcclk>; + clock-names = "biu", "ciu"; + interrupts = < 7 >; + bus-width = < 4 >; + }; + + uart@0x20000 { + compatible = "snps,dw-apb-uart"; + reg = <0x20000 0x100>; + clock-frequency = <33333333>; + interrupts = <17>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + uart@0x21000 { + compatible = "snps,dw-apb-uart"; + reg = <0x21000 0x100>; + clock-frequency = <33333333>; + interrupts = <18>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + /* UART muxed with USB data port (ttyS3) */ + uart@0x22000 { + compatible = "snps,dw-apb-uart"; + reg = <0x22000 0x100>; + clock-frequency = <33333333>; + interrupts = <19>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + i2c@0x1d000 { + compatible = "snps,designware-i2c"; + reg = <0x1d000 0x100>; + clock-frequency = <400000>; + clocks = <&i2cclk>; + interrupts = <14>; + }; + + i2c@0x1e000 { + compatible = "snps,designware-i2c"; + reg = <0x1e000 0x100>; + clock-frequency = <400000>; + clocks = <&i2cclk>; + interrupts = <15>; + }; + + i2c@0x1f000 { + compatible = "snps,designware-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1f000 0x100>; + clock-frequency = <400000>; + clocks = <&i2cclk>; + interrupts = <16>; + + eeprom@0x54{ + compatible = "24c01"; + reg = <0x54>; + pagesize = <0x8>; + }; + + eeprom@0x57{ + compatible = "24c04"; + reg = <0x57>; + pagesize = <0x8>; + }; + }; + + gpio0:gpio@13000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x13000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + gpio0_banka: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <32>; + reg = <0>; + }; + + gpio0_bankb: gpio-controller@1 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <1>; + }; + + gpio0_bankc: gpio-controller@2 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <2>; + }; + }; + + gpio1:gpio@14000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x14000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + gpio1_banka: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <30>; + reg = <0>; + }; + + gpio1_bankb: gpio-controller@1 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <10>; + reg = <1>; + }; + + gpio1_bankc: gpio-controller@2 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <8>; + reg = <2>; + }; + }; + }; +}; diff --git a/target/linux/archs38/dts/nsim_hs_idu.dts b/target/linux/archs38/dts/nsim_hs_idu.dts new file mode 100644 index 0000000..75f539b --- /dev/null +++ b/target/linux/archs38/dts/nsim_hs_idu.dts @@ -0,0 +1,73 @@ +/* + * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "skeleton.dtsi" + +/ { + model = "Synopsys ARC HS38 nSIM simulator"; + compatible = "snps,nsim_hs"; + interrupt-parent = <&core_intc>; + + chosen { + bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8"; + }; + + aliases { + serial0 = &arcuart0; + }; + + fpga { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + /* child and parent address space 1:1 mapped */ + ranges; + + core_intc: core-interrupt-controller { + compatible = "snps,archs-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + + idu_intc: idu-interrupt-controller { + compatible = "snps,archs-idu-intc"; + interrupt-controller; + interrupt-parent = <&core_intc>; + + /* + * <hwirq distribution> + * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 + */ + #interrupt-cells = <2>; + + /* + * upstream irqs to core intc - downstream these are + * "COMMON" irq 0,1.. + */ + interrupts = <24 25 26 27 28 29 30 31>; + }; + + arcuart0: serial@c0fc1000 { + compatible = "snps,arc-uart"; + reg = <0xc0fc1000 0x100>; + interrupt-parent = <&idu_intc>; + interrupts = <0 0>; + clock-frequency = <80000000>; + current-speed = <115200>; + status = "okay"; + }; + + arcpct0: pct { + compatible = "snps,archs-pct"; + #interrupt-cells = <1>; + interrupts = <20>; + }; + }; +}; diff --git a/target/linux/archs38/dts/skeleton.dtsi b/target/linux/archs38/dts/skeleton.dtsi new file mode 100644 index 0000000..296d371 --- /dev/null +++ b/target/linux/archs38/dts/skeleton.dtsi @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Skeleton device tree; the bare minimum needed to boot; just include and + * add a compatible value. + */ + +/ { + compatible = "snps,arc"; + clock-frequency = <80000000>; /* 80 MHZ */ + #address-cells = <1>; + #size-cells = <1>; + chosen { }; + aliases { }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "snps,arc770d"; + reg = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256M */ + }; +}; diff --git a/target/linux/archs38/generic/profiles/00-default.mk b/target/linux/archs38/generic/profiles/00-default.mk new file mode 100644 index 0000000..10edb88 --- /dev/null +++ b/target/linux/archs38/generic/profiles/00-default.mk @@ -0,0 +1,16 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/Default + NAME:=Default Profile (all drivers) + PACKAGES:= kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-mmc kmod-sdhci +endef + +define Profile/Default/Description + Default package set compatible with most boards. +endef +$(eval $(call Profile,Default)) diff --git a/target/linux/archs38/generic/profiles/01-minimal.mk b/target/linux/archs38/generic/profiles/01-minimal.mk new file mode 100644 index 0000000..fe8d8c3 --- /dev/null +++ b/target/linux/archs38/generic/profiles/01-minimal.mk @@ -0,0 +1,15 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/Minimal + NAME:=Minimal Profile (no drivers) +endef + +define Profile/Minimal/Description + Minimal package set compatible with most boards. +endef +$(eval $(call Profile,Minimal)) diff --git a/target/linux/archs38/generic/profiles/02-axs103.mk b/target/linux/archs38/generic/profiles/02-axs103.mk new file mode 100644 index 0000000..4a8ea3a --- /dev/null +++ b/target/linux/archs38/generic/profiles/02-axs103.mk @@ -0,0 +1,16 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/axs103 + NAME:=Synopsys DesignWare AXS103 + PACKAGES:= kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-mmc kmod-sdhci +endef + +define Profile/axs103/Description + Package set compatible with hardware using Synopsys DesignWare AXS103 boards. +endef +$(eval $(call Profile,axs103)) diff --git a/target/linux/archs38/generic/profiles/03-nsim_hs.mk b/target/linux/archs38/generic/profiles/03-nsim_hs.mk new file mode 100644 index 0000000..cebb0a6 --- /dev/null +++ b/target/linux/archs38/generic/profiles/03-nsim_hs.mk @@ -0,0 +1,15 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/nsim_hs + NAME:=Synopsys nSIM +endef + +define Profile/nsim_hs/Description + Package set compatible with hardware using Synopsys nSIM HS boards. +endef +$(eval $(call Profile,nsim_hs)) diff --git a/target/linux/archs38/generic/target.mk b/target/linux/archs38/generic/target.mk new file mode 100644 index 0000000..19b310e --- /dev/null +++ b/target/linux/archs38/generic/target.mk @@ -0,0 +1,8 @@ +BOARDNAME:=Generic +FEATURES += ramdisk usb + +define Target/Description + Build firmware images for generic ARC HS38 based boards. +endef + + diff --git a/target/linux/archs38/image/Makefile b/target/linux/archs38/image/Makefile new file mode 100644 index 0000000..9b0e53f --- /dev/null +++ b/target/linux/archs38/image/Makefile @@ -0,0 +1,41 @@ +# +# Copyright (C) 2016 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/image.mk + +define Build/patch-dtb + $(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb) + $(STAGING_DIR_HOST)/bin/patch-dtb $@ $@.dtb +endef + +# Shared device definition: applies to every defined device +define Device/Default + PROFILES = Default $$(DEVICE_PROFILE) + KERNEL_DEPENDS = $$(wildcard ../dts/$$(DEVICE_DTS).dts) + KERNEL_SUFFIX := .elf + KERNEL_INITRAMFS := kernel-bin | patch-dtb + KERNEL_INITRAMFS_NAME = $$(KERNEL_NAME)-initramfs.elf + DEVICE_PROFILE := + DEVICE_DTS := +endef +DEVICE_VARS += DEVICE_PROFILE DEVICE_DTS + +define add_archs38 + define Device/$(1) + DEVICE_PROFILE := $(1) + DEVICE_DTS := $(1) + endef + TARGET_DEVICES += $(1) +endef + +# DesignWare AXS103 +$(eval $(call add_archs38,axs103_idu)) + +# nSIM with ARCHS38 +$(eval $(call add_archs38,nsim_hs_idu)) + +$(eval $(call BuildImage)) |