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Diffstat (limited to 'target/linux/at91/patches-2.6.22/009-fdl-uartinit.patch')
-rw-r--r--target/linux/at91/patches-2.6.22/009-fdl-uartinit.patch27
1 files changed, 27 insertions, 0 deletions
diff --git a/target/linux/at91/patches-2.6.22/009-fdl-uartinit.patch b/target/linux/at91/patches-2.6.22/009-fdl-uartinit.patch
new file mode 100644
index 0000000..f36f386
--- /dev/null
+++ b/target/linux/at91/patches-2.6.22/009-fdl-uartinit.patch
@@ -0,0 +1,27 @@
+diff -urN linux-2.6.22.1.old/arch/arm/mach-at91/at91rm9200_devices.c linux-2.6.22.1/arch/arm/mach-at91/at91rm9200_devices.c
+--- linux-2.6.22.1.old/arch/arm/mach-at91/at91rm9200_devices.c 2007-07-29 06:46:13.000000000 +0200
++++ linux-2.6.22.1/arch/arm/mach-at91/at91rm9200_devices.c 2007-07-29 07:23:35.000000000 +0200
+@@ -721,6 +721,10 @@
+ * We need to drive the pin manually. Default is off (RTS is active low).
+ */
+ at91_set_gpio_output(AT91_PIN_PA21, 1);
++ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
++ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
++ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
++ at91_set_deglitch(AT91_PIN_PA19, 1);
+ }
+
+ static struct resource uart1_resources[] = {
+@@ -832,6 +836,12 @@
+ {
+ at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
+ at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
++ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
++ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
++ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
++ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
++ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
++ at91_set_deglitch(AT91_PIN_PA24, 1);
+ }
+
+ struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */