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Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0016-bcm2835-i2s-setup-clock-only-if-CPU-is-clock-master.patch')
-rw-r--r--target/linux/brcm2708/patches-4.4/0016-bcm2835-i2s-setup-clock-only-if-CPU-is-clock-master.patch54
1 files changed, 54 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0016-bcm2835-i2s-setup-clock-only-if-CPU-is-clock-master.patch b/target/linux/brcm2708/patches-4.4/0016-bcm2835-i2s-setup-clock-only-if-CPU-is-clock-master.patch
new file mode 100644
index 0000000..e096656
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.4/0016-bcm2835-i2s-setup-clock-only-if-CPU-is-clock-master.patch
@@ -0,0 +1,54 @@
+From fce554c6331b34458db54722cb06eb517a32b305 Mon Sep 17 00:00:00 2001
+From: Matthias Reichl <hias@horus.com>
+Date: Sun, 11 Oct 2015 15:25:51 +0200
+Subject: [PATCH 016/127] bcm2835-i2s: setup clock only if CPU is clock master
+
+Code ported from bcm2708-i2s driver in Raspberry Pi tree.
+
+RPi commit c14827ecdaa36607f6110f9ce8df96e698672191 ("bcm2708: Allow
+option card devices to be configured via DT")
+
+Original work by Zoltan Szenczi, committed to RPi tree by
+Phil Elwell.
+
+Signed-off-by: Matthias Reichl <hias@horus.com>
+---
+ sound/soc/bcm/bcm2835-i2s.c | 28 +++++++++++++++++++---------
+ 1 file changed, 19 insertions(+), 9 deletions(-)
+
+--- a/sound/soc/bcm/bcm2835-i2s.c
++++ b/sound/soc/bcm/bcm2835-i2s.c
+@@ -411,15 +411,25 @@ static int bcm2835_i2s_hw_params(struct
+ divf = dividend & BCM2835_CLK_DIVF_MASK;
+ }
+
+- /* Set clock divider */
+- regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD
+- | BCM2835_CLK_DIVI(divi)
+- | BCM2835_CLK_DIVF(divf));
++ /* Clock should only be set up here if CPU is clock master */
++ switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
++ case SND_SOC_DAIFMT_CBS_CFS:
++ case SND_SOC_DAIFMT_CBS_CFM:
++ /* Set clock divider */
++ regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG,
++ BCM2835_CLK_PASSWD
++ | BCM2835_CLK_DIVI(divi)
++ | BCM2835_CLK_DIVF(divf));
+
+- /* Setup clock, but don't start it yet */
+- regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD
+- | BCM2835_CLK_MASH(mash)
+- | BCM2835_CLK_SRC(clk_src));
++ /* Setup clock, but don't start it yet */
++ regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG,
++ BCM2835_CLK_PASSWD
++ | BCM2835_CLK_MASH(mash)
++ | BCM2835_CLK_SRC(clk_src));
++ break;
++ default:
++ break;
++ }
+
+ /* Setup the frame format */
+ format = BCM2835_I2S_CHEN;