diff options
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch')
-rw-r--r-- | target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch b/target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch new file mode 100644 index 0000000..3128cf2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.4/0570-BCM270X_DT-Add-spi0-cs-overlay.patch @@ -0,0 +1,91 @@ +From 1a2339385e478e3ae3ee4f79edbfefd7fd22e96c Mon Sep 17 00:00:00 2001 +From: Phil Elwell <phil@raspberrypi.org> +Date: Mon, 16 Jan 2017 14:53:12 +0000 +Subject: [PATCH] BCM270X_DT: Add spi0-cs overlay + +The spi0-cs overlay allows the software chip selectts to be modified +using the cs0_pin and cs1_pin parameters. +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 9 +++++++- + arch/arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 ++++++++++++++++++++++++++ + 3 files changed, 38 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts + +diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile +index 05eda03..72f2d90a 100644 +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -93,6 +93,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo + dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo + dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo + dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo ++dtbo-$(RPI_DT_OVERLAYS) += spi0-cs.dtbo + dtbo-$(RPI_DT_OVERLAYS) += spi0-hw-cs.dtbo + dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo + dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo +diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README +index adb86bc..7f4bd29 100644 +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1131,7 +1131,7 @@ Params: <None> + + + Name: spi-gpio35-39 +-Info: move SPI function block to GPIO 35 to 39 ++Info: Move SPI function block to GPIO 35 to 39 + Load: dtoverlay=spi-gpio35-39 + Params: <None> + +@@ -1142,6 +1142,13 @@ Load: dtoverlay=spi-rtc,<param>=<val> + Params: pcf2123 Select the PCF2123 device + + ++Name: spi0-cs ++Info: Allows the (software) CS pins for SPI0 to be changed ++Load: dtoverlay=spi0-cs,<param>=<val> ++Params: cs0_pin GPIO pin for CS0 (default 8) ++ cs1_pin GPIO pin for CS1 (default 7) ++ ++ + Name: spi0-hw-cs + Info: Re-enables hardware CS/CE (chip selects) for SPI0 + Load: dtoverlay=spi0-hw-cs +diff --git a/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts +new file mode 100644 +index 0000000..7f79029 +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts +@@ -0,0 +1,29 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spi0_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <8 7>; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi0>; ++ frag1: __overlay__ { ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs1_pin = <&frag0>,"brcm,pins:4", ++ <&frag1>,"cs-gpios:16"; ++ }; ++}; +-- +2.1.4 + |