diff options
Diffstat (limited to 'target/linux/cns3xxx/patches-3.3')
22 files changed, 0 insertions, 1355 deletions
diff --git a/target/linux/cns3xxx/patches-3.3/010-move_virtual_io_space.patch b/target/linux/cns3xxx/patches-3.3/010-move_virtual_io_space.patch deleted file mode 100644 index c7d89d5..0000000 --- a/target/linux/cns3xxx/patches-3.3/010-move_virtual_io_space.patch +++ /dev/null @@ -1,198 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -24,17 +24,7 @@ static struct map_desc cns3xxx_io_desc[] - { - .virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE), -- .length = SZ_4K, -- .type = MT_DEVICE, -- }, { -- .virtual = CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT, -- .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE), -- .length = SZ_4K, -- .type = MT_DEVICE, -- }, { -- .virtual = CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT, -- .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE), -- .length = SZ_4K, -+ .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT, ---- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h -+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h -@@ -20,22 +20,22 @@ - #define CNS3XXX_SPI_FLASH_BASE 0x60000000 /* SPI Serial Flash Memory */ - - #define CNS3XXX_SWITCH_BASE 0x70000000 /* Switch and HNAT Control */ --#define CNS3XXX_SWITCH_BASE_VIRT 0xFFF00000 -+#define CNS3XXX_SWITCH_BASE_VIRT 0xFEF00000 - - #define CNS3XXX_PPE_BASE 0x70001000 /* HANT */ --#define CNS3XXX_PPE_BASE_VIRT 0xFFF50000 -+#define CNS3XXX_PPE_BASE_VIRT 0xFEF50000 - - #define CNS3XXX_EMBEDDED_SRAM_BASE 0x70002000 /* HANT Embedded SRAM */ --#define CNS3XXX_EMBEDDED_SRAM_BASE_VIRT 0xFFF60000 -+#define CNS3XXX_EMBEDDED_SRAM_BASE_VIRT 0xFEF60000 - - #define CNS3XXX_SSP_BASE 0x71000000 /* Synchronous Serial Port - SPI/PCM/I2C */ --#define CNS3XXX_SSP_BASE_VIRT 0xFFF01000 -+#define CNS3XXX_SSP_BASE_VIRT 0xFEF01000 - - #define CNS3XXX_DMC_BASE 0x72000000 /* DMC Control (DDR2 SDRAM) */ --#define CNS3XXX_DMC_BASE_VIRT 0xFFF02000 -+#define CNS3XXX_DMC_BASE_VIRT 0xFEF02000 - - #define CNS3XXX_SMC_BASE 0x73000000 /* SMC Control */ --#define CNS3XXX_SMC_BASE_VIRT 0xFFF03000 -+#define CNS3XXX_SMC_BASE_VIRT 0xFEF03000 - - #define SMC_MEMC_STATUS_OFFSET 0x000 - #define SMC_MEMIF_CFG_OFFSET 0x004 -@@ -74,13 +74,13 @@ - #define SMC_PCELL_ID_3_OFFSET 0xFFC - - #define CNS3XXX_GPIOA_BASE 0x74000000 /* GPIO port A */ --#define CNS3XXX_GPIOA_BASE_VIRT 0xFFF04000 -+#define CNS3XXX_GPIOA_BASE_VIRT 0xFEF04000 - - #define CNS3XXX_GPIOB_BASE 0x74800000 /* GPIO port B */ --#define CNS3XXX_GPIOB_BASE_VIRT 0xFFF05000 -+#define CNS3XXX_GPIOB_BASE_VIRT 0xFEF05000 - - #define CNS3XXX_RTC_BASE 0x75000000 /* Real Time Clock */ --#define CNS3XXX_RTC_BASE_VIRT 0xFFF06000 -+#define CNS3XXX_RTC_BASE_VIRT 0xFEF06000 - - #define RTC_SEC_OFFSET 0x00 - #define RTC_MIN_OFFSET 0x04 -@@ -94,10 +94,10 @@ - #define RTC_INTR_STS_OFFSET 0x34 - - #define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */ --#define CNS3XXX_MISC_BASE_VIRT 0xFFF07000 /* Misc Control */ -+#define CNS3XXX_MISC_BASE_VIRT 0xFEF07000 /* Misc Control */ - - #define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */ --#define CNS3XXX_PM_BASE_VIRT 0xFFF08000 -+#define CNS3XXX_PM_BASE_VIRT 0xFEF08000 - - #define PM_CLK_GATE_OFFSET 0x00 - #define PM_SOFT_RST_OFFSET 0x04 -@@ -109,28 +109,28 @@ - #define PM_PLL_HM_PD_OFFSET 0x1C - - #define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */ --#define CNS3XXX_UART0_BASE_VIRT 0xFFF09000 -+#define CNS3XXX_UART0_BASE_VIRT 0xFEF09000 - - #define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */ --#define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000 -+#define CNS3XXX_UART1_BASE_VIRT 0xFEF0A000 - - #define CNS3XXX_UART2_BASE 0x78800000 /* UART 2 */ --#define CNS3XXX_UART2_BASE_VIRT 0xFFF0B000 -+#define CNS3XXX_UART2_BASE_VIRT 0xFEF0B000 - - #define CNS3XXX_DMAC_BASE 0x79000000 /* Generic DMA Control */ --#define CNS3XXX_DMAC_BASE_VIRT 0xFFF0D000 -+#define CNS3XXX_DMAC_BASE_VIRT 0xFEF0D000 - - #define CNS3XXX_CORESIGHT_BASE 0x7A000000 /* CoreSight */ --#define CNS3XXX_CORESIGHT_BASE_VIRT 0xFFF0E000 -+#define CNS3XXX_CORESIGHT_BASE_VIRT 0xFEF0E000 - - #define CNS3XXX_CRYPTO_BASE 0x7B000000 /* Crypto */ --#define CNS3XXX_CRYPTO_BASE_VIRT 0xFFF0F000 -+#define CNS3XXX_CRYPTO_BASE_VIRT 0xFEF0F000 - - #define CNS3XXX_I2S_BASE 0x7C000000 /* I2S */ --#define CNS3XXX_I2S_BASE_VIRT 0xFFF10000 -+#define CNS3XXX_I2S_BASE_VIRT 0xFEF10000 - - #define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */ --#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800 -+#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFEF10800 - - #define TIMER1_COUNTER_OFFSET 0x00 - #define TIMER1_AUTO_RELOAD_OFFSET 0x04 -@@ -150,42 +150,42 @@ - #define TIMER_FREERUN_CONTROL_OFFSET 0x44 - - #define CNS3XXX_HCIE_BASE 0x7D000000 /* HCIE Control */ --#define CNS3XXX_HCIE_BASE_VIRT 0xFFF30000 -+#define CNS3XXX_HCIE_BASE_VIRT 0xFEF30000 - - #define CNS3XXX_RAID_BASE 0x7E000000 /* RAID Control */ --#define CNS3XXX_RAID_BASE_VIRT 0xFFF12000 -+#define CNS3XXX_RAID_BASE_VIRT 0xFEF12000 - - #define CNS3XXX_AXI_IXC_BASE 0x7F000000 /* AXI IXC */ --#define CNS3XXX_AXI_IXC_BASE_VIRT 0xFFF13000 -+#define CNS3XXX_AXI_IXC_BASE_VIRT 0xFEF13000 - - #define CNS3XXX_CLCD_BASE 0x80000000 /* LCD Control */ --#define CNS3XXX_CLCD_BASE_VIRT 0xFFF14000 -+#define CNS3XXX_CLCD_BASE_VIRT 0xFEF14000 - - #define CNS3XXX_USBOTG_BASE 0x81000000 /* USB OTG Control */ --#define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000 -+#define CNS3XXX_USBOTG_BASE_VIRT 0xFEF15000 - - #define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */ - - #define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */ - #define CNS3XXX_SATA2_SIZE SZ_16M --#define CNS3XXX_SATA2_BASE_VIRT 0xFFF17000 -+#define CNS3XXX_SATA2_BASE_VIRT 0xFEF17000 - - #define CNS3XXX_CAMERA_BASE 0x84000000 /* Camera Interface */ --#define CNS3XXX_CAMERA_BASE_VIRT 0xFFF18000 -+#define CNS3XXX_CAMERA_BASE_VIRT 0xFEF18000 - - #define CNS3XXX_SDIO_BASE 0x85000000 /* SDIO */ --#define CNS3XXX_SDIO_BASE_VIRT 0xFFF19000 -+#define CNS3XXX_SDIO_BASE_VIRT 0xFEF19000 - - #define CNS3XXX_I2S_TDM_BASE 0x86000000 /* I2S TDM */ --#define CNS3XXX_I2S_TDM_BASE_VIRT 0xFFF1A000 -+#define CNS3XXX_I2S_TDM_BASE_VIRT 0xFEF1A000 - - #define CNS3XXX_2DG_BASE 0x87000000 /* 2D Graphic Control */ --#define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000 -+#define CNS3XXX_2DG_BASE_VIRT 0xFEF1B000 - - #define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */ - - #define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */ --#define CNS3XXX_L2C_BASE_VIRT 0xFFF27000 -+#define CNS3XXX_L2C_BASE_VIRT 0xFEF27000 - - #define CNS3XXX_PCIE0_MEM_BASE 0xA0000000 /* PCIe Port 0 IO/Memory Space */ - #define CNS3XXX_PCIE0_MEM_BASE_VIRT 0xE0000000 -@@ -227,19 +227,19 @@ - * Testchip peripheral and fpga gic regions - */ - #define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */ --#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFF000000 -+#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFEE00000 - - #define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */ --#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFF000100 -+#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFEE00100 - - #define CNS3XXX_TC11MP_TWD_BASE 0x90000600 --#define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFF000600 -+#define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFEE00600 - - #define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */ --#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000 -+#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFEE01000 - - #define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */ --#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000 -+#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFEE02000 - - /* - * Misc block diff --git a/target/linux/cns3xxx/patches-3.3/015-clkdev_support.patch b/target/linux/cns3xxx/patches-3.3/015-clkdev_support.patch deleted file mode 100644 index 8d10822..0000000 --- a/target/linux/cns3xxx/patches-3.3/015-clkdev_support.patch +++ /dev/null @@ -1,69 +0,0 @@ ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -368,6 +368,7 @@ config ARCH_CNS3XXX - select CPU_V6K - select GENERIC_CLOCKEVENTS - select ARM_GIC -+ select CLKDEV_LOOKUP - select MIGHT_HAVE_CACHE_L2X0 - select MIGHT_HAVE_PCI - select PCI_DOMAINS if PCI ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -9,8 +9,11 @@ - */ - - #include <linux/init.h> -+#include <linux/export.h> - #include <linux/interrupt.h> - #include <linux/clockchips.h> -+#include <linux/clk.h> -+#include <linux/clkdev.h> - #include <linux/io.h> - #include <asm/mach/map.h> - #include <asm/mach/time.h> -@@ -20,6 +23,10 @@ - #include <mach/cns3xxx.h> - #include "core.h" - -+struct clk { -+ unsigned long rate; -+}; -+ - static struct map_desc cns3xxx_io_desc[] __initdata = { - { - .virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT, -@@ -277,3 +284,33 @@ void __init cns3xxx_l2x0_init(void) - } - - #endif /* CONFIG_CACHE_L2X0 */ -+ -+int clk_enable(struct clk *clk) -+{ -+ return 0; -+} -+EXPORT_SYMBOL(clk_enable); -+ -+void clk_disable(struct clk *clk) -+{ -+} -+EXPORT_SYMBOL(clk_disable); -+ -+unsigned long clk_get_rate(struct clk *clk) -+{ -+ return clk->rate; -+} -+EXPORT_SYMBOL(clk_get_rate); -+ -+static struct clk_lookup cns3xxx_clocks[] = { -+ { -+ /* TODO */ -+ }, -+}; -+ -+int __init cns3xxx_clocks_init(void) -+{ -+ clkdev_add_table(cns3xxx_clocks, ARRAY_SIZE(cns3xxx_clocks)); -+ return 0; -+} -+postcore_initcall(cns3xxx_clocks_init); diff --git a/target/linux/cns3xxx/patches-3.3/020-watchdog_support.patch b/target/linux/cns3xxx/patches-3.3/020-watchdog_support.patch deleted file mode 100644 index 4634762..0000000 --- a/target/linux/cns3xxx/patches-3.3/020-watchdog_support.patch +++ /dev/null @@ -1,59 +0,0 @@ -1. Made the connection between CNS3xxx SOCs(ARCH_CNS3xxx) and MPcore watchdog - since the CNS3xxx SOCs have ARM11 MPcore CPU. -2. Enable mpcore_watchdog option as module to default configuration at - arch/arm/configs/cns3420vb_defconfig. - -Signed-off-by: Tommy Lin <tommy.lin@caviumnetworks.com> - ---- -arch/arm/Kconfig | 1 + - arch/arm/configs/cns3420vb_defconfig | 2 ++ - arch/arm/mach-cns3xxx/cns3420vb.c | 22 ++++++++++++++++++++++ - 3 files changed, 25 insertions(+), 0 deletions(-) - ---- a/arch/arm/configs/cns3420vb_defconfig -+++ b/arch/arm/configs/cns3420vb_defconfig -@@ -53,6 +53,8 @@ CONFIG_LEGACY_PTY_COUNT=16 - # CONFIG_HW_RANDOM is not set - # CONFIG_HWMON is not set - # CONFIG_VGA_CONSOLE is not set -+CONFIG_WATCHDOG=y -+CONFIG_MPCORE_WATCHDOG=m - # CONFIG_HID_SUPPORT is not set - # CONFIG_USB_SUPPORT is not set - CONFIG_MMC=y ---- a/arch/arm/mach-cns3xxx/cns3420vb.c -+++ b/arch/arm/mach-cns3xxx/cns3420vb.c -@@ -159,10 +159,32 @@ static struct platform_device cns3xxx_us - }, - }; - -+/* Watchdog */ -+static struct resource cns3xxx_watchdog_resources[] = { -+ [0] = { -+ .start = CNS3XXX_TC11MP_TWD_BASE, -+ .end = CNS3XXX_TC11MP_TWD_BASE + PAGE_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+ [1] = { -+ .start = IRQ_LOCALWDOG, -+ .end = IRQ_LOCALWDOG, -+ .flags = IORESOURCE_IRQ, -+ } -+}; -+ -+static struct platform_device cns3xxx_watchdog_device = { -+ .name = "mpcore_wdt", -+ .id = -1, -+ .num_resources = ARRAY_SIZE(cns3xxx_watchdog_resources), -+ .resource = cns3xxx_watchdog_resources, -+}; -+ - /* - * Initialization - */ - static struct platform_device *cns3420_pdevs[] __initdata = { -+ &cns3xxx_watchdog_device, - &cns3420_nor_pdev, - &cns3xxx_usb_ehci_device, - &cns3xxx_usb_ohci_device, diff --git a/target/linux/cns3xxx/patches-3.3/025-smp_support.patch b/target/linux/cns3xxx/patches-3.3/025-smp_support.patch deleted file mode 100644 index 578cbaf..0000000 --- a/target/linux/cns3xxx/patches-3.3/025-smp_support.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/Makefile -+++ b/arch/arm/mach-cns3xxx/Makefile -@@ -1,3 +1,6 @@ - obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o - obj-$(CONFIG_PCI) += pcie.o - obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o -+obj-$(CONFIG_SMP) += platsmp.o headsmp.o -+obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -+obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -372,6 +372,7 @@ config ARCH_CNS3XXX - select MIGHT_HAVE_CACHE_L2X0 - select MIGHT_HAVE_PCI - select PCI_DOMAINS if PCI -+ select HAVE_SMP - help - Support for Cavium Networks CNS3XXX platform. - diff --git a/target/linux/cns3xxx/patches-3.3/030-pcie_clock.patch b/target/linux/cns3xxx/patches-3.3/030-pcie_clock.patch deleted file mode 100644 index 0c6c525..0000000 --- a/target/linux/cns3xxx/patches-3.3/030-pcie_clock.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/pcie.c -+++ b/arch/arm/mach-cns3xxx/pcie.c -@@ -378,8 +378,6 @@ static int __init cns3xxx_pcie_init(void - for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { - iotable_init(cns3xxx_pcie[i].cfg_bases, - ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases)); -- cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i)); -- cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i)); - cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); - cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); - pci_common_init(&cns3xxx_pcie[i].hw_pci); diff --git a/target/linux/cns3xxx/patches-3.3/035-add_io_spaces.patch b/target/linux/cns3xxx/patches-3.3/035-add_io_spaces.patch deleted file mode 100644 index b4b018b..0000000 --- a/target/linux/cns3xxx/patches-3.3/035-add_io_spaces.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -58,6 +58,16 @@ static struct map_desc cns3xxx_io_desc[] - .pfn = __phys_to_pfn(CNS3XXX_PM_BASE), - .length = SZ_4K, - .type = MT_DEVICE, -+ }, { -+ .virtual = CNS3XXX_SWITCH_BASE_VIRT, -+ .pfn = __phys_to_pfn(CNS3XXX_SWITCH_BASE), -+ .length = SZ_4K, -+ .type = MT_DEVICE, -+ }, { -+ .virtual = CNS3XXX_SSP_BASE_VIRT, -+ .pfn = __phys_to_pfn(CNS3XXX_SSP_BASE), -+ .length = SZ_4K, -+ .type = MT_DEVICE, - }, - }; - diff --git a/target/linux/cns3xxx/patches-3.3/040-fiq_support.patch b/target/linux/cns3xxx/patches-3.3/040-fiq_support.patch deleted file mode 100644 index 9680532..0000000 --- a/target/linux/cns3xxx/patches-3.3/040-fiq_support.patch +++ /dev/null @@ -1,96 +0,0 @@ ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -373,6 +373,7 @@ config ARCH_CNS3XXX - select MIGHT_HAVE_PCI - select PCI_DOMAINS if PCI - select HAVE_SMP -+ select FIQ - help - Support for Cavium Networks CNS3XXX platform. - ---- a/arch/arm/kernel/fiq.c -+++ b/arch/arm/kernel/fiq.c -@@ -49,6 +49,8 @@ - - static unsigned long no_fiq_insn; - -+unsigned int fiq_number[2] = {0, 0}; -+ - /* Default reacquire function - * - we always relinquish FIQ control - * - we always reacquire FIQ control -@@ -70,9 +72,12 @@ static struct fiq_handler *current_fiq = - - int show_fiq_list(struct seq_file *p, int prec) - { -- if (current_fiq != &default_owner) -- seq_printf(p, "%*s: %s\n", prec, "FIQ", -- current_fiq->name); -+ if (current_fiq != &default_owner) { -+ seq_printf(p, "%*s: ", prec, "FIQ"); -+ seq_printf(p, "%10u ", fiq_number[0]); -+ seq_printf(p, "%10u ", fiq_number[1]); -+ seq_printf(p, " %s\n", current_fiq->name); -+ } - - return 0; - } ---- a/arch/arm/kernel/smp.c -+++ b/arch/arm/kernel/smp.c -@@ -400,13 +400,13 @@ void show_ipi_list(struct seq_file *p, i - unsigned int cpu, i; - - for (i = 0; i < NR_IPI; i++) { -- seq_printf(p, "%*s%u: ", prec - 1, "IPI", i); -+ seq_printf(p, "%*s%u:", prec - 1, "IPI", i); - - for_each_present_cpu(cpu) - seq_printf(p, "%10u ", - __get_irq_stat(cpu, ipi_irqs[i])); - -- seq_printf(p, " %s\n", ipi_types[i]); -+ seq_printf(p, " %s\n", ipi_types[i]); - } - } - ---- a/arch/arm/mach-cns3xxx/Makefile -+++ b/arch/arm/mach-cns3xxx/Makefile -@@ -1,6 +1,6 @@ - obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o - obj-$(CONFIG_PCI) += pcie.o - obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o --obj-$(CONFIG_SMP) += platsmp.o headsmp.o -+obj-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o - obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o - obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o ---- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h -+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h -@@ -294,6 +294,7 @@ - #define MISC_PCIE_INT_MASK(x) MISC_MEM_MAP(0x978 + (x) * 0x100) - #define MISC_PCIE_INT_STATUS(x) MISC_MEM_MAP(0x97C + (x) * 0x100) - -+#define MISC_FIQ_CPU(x) MISC_MEM_MAP(0xA58 - (x) * 0x4) - /* - * Power management and clock control - */ ---- a/arch/arm/mach-cns3xxx/include/mach/irqs.h -+++ b/arch/arm/mach-cns3xxx/include/mach/irqs.h -@@ -14,6 +14,7 @@ - #define IRQ_LOCALTIMER 29 - #define IRQ_LOCALWDOG 30 - #define IRQ_TC11MP_GIC_START 32 -+#define FIQ_START 0 - - #include <mach/cns3xxx.h> - ---- a/arch/arm/mm/Kconfig -+++ b/arch/arm/mm/Kconfig -@@ -793,7 +793,7 @@ config NEEDS_SYSCALL_FOR_CMPXCHG - - config DMA_CACHE_RWFO - bool "Enable read/write for ownership DMA cache maintenance" -- depends on CPU_V6K && SMP -+ depends on CPU_V6K && SMP && !ARCH_CNS3XXX - default y - help - The Snoop Control Unit on ARM11MPCore does not detect the diff --git a/target/linux/cns3xxx/patches-3.3/045-twd_base.patch b/target/linux/cns3xxx/patches-3.3/045-twd_base.patch deleted file mode 100644 index b83ebaa..0000000 --- a/target/linux/cns3xxx/patches-3.3/045-twd_base.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -19,6 +19,7 @@ - #include <asm/mach/time.h> - #include <asm/mach/irq.h> - #include <asm/hardware/gic.h> -+#include <asm/smp_twd.h> - #include <asm/hardware/cache-l2x0.h> - #include <mach/cns3xxx.h> - #include "core.h" -@@ -73,6 +74,9 @@ static struct map_desc cns3xxx_io_desc[] - - void __init cns3xxx_map_io(void) - { -+#ifdef CONFIG_LOCAL_TIMERS -+ twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT; -+#endif - iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc)); - } - diff --git a/target/linux/cns3xxx/patches-3.3/050-pcie_section_mismatch_fixes.patch b/target/linux/cns3xxx/patches-3.3/050-pcie_section_mismatch_fixes.patch deleted file mode 100644 index 6d6385a..0000000 --- a/target/linux/cns3xxx/patches-3.3/050-pcie_section_mismatch_fixes.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/pcie.c -+++ b/arch/arm/mach-cns3xxx/pcie.c -@@ -161,12 +161,12 @@ static int cns3xxx_pci_setup(int nr, str - return 1; - } - --static struct pci_ops cns3xxx_pcie_ops = { -+struct pci_ops cns3xxx_pcie_ops = { - .read = cns3xxx_pci_read_config, - .write = cns3xxx_pci_write_config, - }; - --static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys) -+struct pci_bus * __devinit cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys) - { - return pci_scan_root_bus(NULL, sys->busnr, &cns3xxx_pcie_ops, sys, - &sys->resources); diff --git a/target/linux/cns3xxx/patches-3.3/055-pcie_io.patch b/target/linux/cns3xxx/patches-3.3/055-pcie_io.patch deleted file mode 100644 index 3f589e7..0000000 --- a/target/linux/cns3xxx/patches-3.3/055-pcie_io.patch +++ /dev/null @@ -1,77 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -69,6 +69,16 @@ static struct map_desc cns3xxx_io_desc[] - .pfn = __phys_to_pfn(CNS3XXX_SSP_BASE), - .length = SZ_4K, - .type = MT_DEVICE, -+ }, { -+ .virtual = CNS3XXX_PCIE0_IO_BASE_VIRT, -+ .pfn = __phys_to_pfn(CNS3XXX_PCIE0_IO_BASE), -+ .length = SZ_16M, -+ .type = MT_DEVICE, -+ }, { -+ .virtual = CNS3XXX_PCIE1_IO_BASE_VIRT, -+ .pfn = __phys_to_pfn(CNS3XXX_PCIE1_IO_BASE), -+ .length = SZ_16M, -+ .type = MT_DEVICE, - }, - }; - -@@ -83,13 +93,13 @@ void __init cns3xxx_map_io(void) - /* used by entry-macro.S */ - void __init cns3xxx_init_irq(void) - { -- gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), -- __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); -+ gic_init(0, 29, (void __iomem *) CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT, -+ (void __iomem *) CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT); - } - - void cns3xxx_power_off(void) - { -- u32 __iomem *pm_base = __io(CNS3XXX_PM_BASE_VIRT); -+ u32 __iomem *pm_base = (void __iomem *) CNS3XXX_PM_BASE_VIRT; - u32 clkctrl; - - printk(KERN_INFO "powering system down...\n"); -@@ -248,7 +258,7 @@ static void __init __cns3xxx_timer_init( - - static void __init cns3xxx_timer_init(void) - { -- cns3xxx_tmr1 = __io(CNS3XXX_TIMER1_2_3_BASE_VIRT); -+ cns3xxx_tmr1 = (void __iomem *) CNS3XXX_TIMER1_2_3_BASE_VIRT; - - __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0); - } ---- a/arch/arm/mach-cns3xxx/devices.c -+++ b/arch/arm/mach-cns3xxx/devices.c -@@ -98,7 +98,7 @@ static struct platform_device cns3xxx_sd - - void __init cns3xxx_sdhci_init(void) - { -- u32 __iomem *gpioa = __io(CNS3XXX_MISC_BASE_VIRT + 0x0014); -+ u32 __iomem *gpioa = (void __iomem *) (CNS3XXX_MISC_BASE_VIRT + 0x0014); - u32 gpioa_pins = __raw_readl(gpioa); - - /* MMC/SD pins share with GPIOA */ ---- a/arch/arm/mach-cns3xxx/include/mach/io.h -+++ b/arch/arm/mach-cns3xxx/include/mach/io.h -@@ -9,9 +9,17 @@ - #ifndef __MACH_IO_H - #define __MACH_IO_H - -+#include "cns3xxx.h" -+ - #define IO_SPACE_LIMIT 0xffffffff - --#define __io(a) __typesafe_io(a) -+static inline void __iomem *__io(unsigned long addr) -+{ -+ return (void __iomem *)((addr - CNS3XXX_PCIE0_IO_BASE) -+ + CNS3XXX_PCIE0_IO_BASE_VIRT); -+} -+ -+#define __io(a) __io(a) - #define __mem_pci(a) (a) - - #endif diff --git a/target/linux/cns3xxx/patches-3.3/060-pcie_abort.patch b/target/linux/cns3xxx/patches-3.3/060-pcie_abort.patch deleted file mode 100644 index 788b620..0000000 --- a/target/linux/cns3xxx/patches-3.3/060-pcie_abort.patch +++ /dev/null @@ -1,128 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/pcie.c -+++ b/arch/arm/mach-cns3xxx/pcie.c -@@ -92,6 +92,78 @@ static void __iomem *cns3xxx_pci_cfg_bas - return base + offset; - } - -+static inline int check_master_abort(struct pci_bus *bus, unsigned int devfn, int where) -+{ -+ struct cns3xxx_pcie *cnspci = pbus_to_cnspci(bus); -+ -+ /* check PCI-compatible status register after access */ -+ if (cnspci->linked) { -+ u32 host_base, sreg, ereg; -+ -+ host_base = cnspci->cfg_bases[CNS3XXX_HOST_TYPE].virtual; -+ sreg = __raw_readw(host_base + 0x6) & 0xF900; -+ ereg = __raw_readl(host_base + 0x104); // Uncorrectable Error Status Reg -+ -+ if (sreg | ereg) { -+ /* SREG: -+ * BIT15 - Detected Parity Error -+ * BIT14 - Signaled System Error -+ * BIT13 - Received Master Abort -+ * BIT12 - Received Target Abort -+ * BIT11 - Signaled Target Abort -+ * BIT08 - Master Data Parity Error -+ * -+ * EREG: -+ * BIT20 - Unsupported Request -+ * BIT19 - ECRC -+ * BIT18 - Malformed TLP -+ * BIT17 - Receiver Overflow -+ * BIT16 - Unexpected Completion -+ * BIT15 - Completer Abort -+ * BIT14 - Completion Timeout -+ * BIT13 - Flow Control Protocol Error -+ * BIT12 - Poisoned TLP -+ * BIT04 - Data Link Protocol Error -+ * -+ * TODO: see Documentation/pci-error-recovery.txt -+ * implement error_detected handler -+ */ -+/* -+ printk("pci error: %04d:%02x:%02x.%02x sreg=0x%04x ereg=0x%08x", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), sreg, ereg); -+ if (sreg & BIT(15)) printk(" <PERR"); -+ if (sreg & BIT(14)) printk(" >SERR"); -+ if (sreg & BIT(13)) printk(" <MABRT"); -+ if (sreg & BIT(12)) printk(" <TABRT"); -+ if (sreg & BIT(11)) printk(" >TABRT"); -+ if (sreg & BIT( 8)) printk(" MPERR"); -+ -+ if (ereg & BIT(20)) printk(" Unsup"); -+ if (ereg & BIT(19)) printk(" ECRC"); -+ if (ereg & BIT(18)) printk(" MTLP"); -+ if (ereg & BIT(17)) printk(" OFLOW"); -+ if (ereg & BIT(16)) printk(" Unex"); -+ if (ereg & BIT(15)) printk(" ABRT"); -+ if (ereg & BIT(14)) printk(" COMPTO"); -+ if (ereg & BIT(13)) printk(" FLOW"); -+ if (ereg & BIT(12)) printk(" PTLP"); -+ if (ereg & BIT( 4)) printk(" DLINK"); -+ printk("\n"); -+*/ -+ pr_debug("%s failed port%d sreg=0x%04x\n", __func__, -+ cnspci->hw_pci.domain, sreg); -+ -+ /* make sure the status bits are reset */ -+ __raw_writew(sreg, host_base + 6); -+ __raw_writel(ereg, host_base + 0x104); -+ return 1; -+ } -+ } -+ else -+ return 1; -+ -+ return 0; -+} -+ - static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) - { -@@ -108,6 +180,11 @@ static int cns3xxx_pci_read_config(struc - - v = __raw_readl(base); - -+ if (check_master_abort(bus, devfn, where)) { -+ printk(KERN_ERR "pci error: %04d:%02x:%02x.%02x %02x(%d)= master_abort on read\n", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size); -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ } -+ - if (bus->number == 0 && devfn == 0 && - (where & 0xffc) == PCI_CLASS_REVISION) { - /* -@@ -137,11 +214,19 @@ static int cns3xxx_pci_write_config(stru - return PCIBIOS_SUCCESSFUL; - - v = __raw_readl(base); -+ if (check_master_abort(bus, devfn, where)) { -+ printk(KERN_ERR "pci error: %04d:%02x:%02x.%02x %02x(%d)=0x%08x master_abort on read\n", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val); -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ } - - v &= ~(mask << shift); - v |= (val & mask) << shift; - - __raw_writel(v, base); -+ if (check_master_abort(bus, devfn, where)) { -+ printk(KERN_ERR "pci error: %04d:%02x:%02x.%02x %02x(%d)=0x%08x master_abort on write\n", pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val); -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ } - - return PCIBIOS_SUCCESSFUL; - } -@@ -360,8 +445,14 @@ static void __init cns3xxx_pcie_hw_init( - static int cns3xxx_pcie_abort_handler(unsigned long addr, unsigned int fsr, - struct pt_regs *regs) - { -+#if 0 -+/* R14_ABORT = PC+4 for XSCALE but not ARM11MPCORE -+ * ignore imprecise aborts and use PCI-compatible Status register to -+ * determine errors instead -+ */ - if (fsr & (1 << 10)) - regs->ARM_pc += 4; -+#endif - return 0; - } - diff --git a/target/linux/cns3xxx/patches-3.3/065-pcie_early_init.patch b/target/linux/cns3xxx/patches-3.3/065-pcie_early_init.patch deleted file mode 100644 index 551f5a1..0000000 --- a/target/linux/cns3xxx/patches-3.3/065-pcie_early_init.patch +++ /dev/null @@ -1,85 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/cns3420vb.c -+++ b/arch/arm/mach-cns3xxx/cns3420vb.c -@@ -214,11 +214,21 @@ static struct map_desc cns3420_io_desc[] - static void __init cns3420_map_io(void) - { - cns3xxx_map_io(); -+ cns3xxx_pcie_iotable_init(); - iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc)); - - cns3420_early_serial_setup(); - } - -+static int __init cns3420vb_pcie_init(void) -+{ -+ if (!machine_is_cns3420vb()) -+ return 0; -+ -+ return cns3xxx_pcie_init(); -+} -+subsys_initcall(cns3420vb_pcie_init); -+ - MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") - .atag_offset = 0x100, - .map_io = cns3420_map_io, ---- a/arch/arm/mach-cns3xxx/core.h -+++ b/arch/arm/mach-cns3xxx/core.h -@@ -12,6 +12,8 @@ - #define __CNS3XXX_CORE_H - - extern struct sys_timer cns3xxx_timer; -+extern void cns3xxx_pcie_iotable_init(void); -+ - - #ifdef CONFIG_CACHE_L2X0 - void __init cns3xxx_l2x0_init(void); -@@ -21,6 +23,7 @@ static inline void cns3xxx_l2x0_init(voi - - void __init cns3xxx_map_io(void); - void __init cns3xxx_init_irq(void); -+int __init cns3xxx_pcie_init(void); - void cns3xxx_power_off(void); - void cns3xxx_restart(char, const char *); - ---- a/arch/arm/mach-cns3xxx/pcie.c -+++ b/arch/arm/mach-cns3xxx/pcie.c -@@ -456,7 +456,18 @@ static int cns3xxx_pcie_abort_handler(un - return 0; - } - --static int __init cns3xxx_pcie_init(void) -+ -+void __init cns3xxx_pcie_iotable_init() -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { -+ iotable_init(cns3xxx_pcie[i].cfg_bases, -+ ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases)); -+ } -+} -+ -+int __init cns3xxx_pcie_init(void) - { - int i; - -@@ -467,15 +478,14 @@ static int __init cns3xxx_pcie_init(void - "imprecise external abort"); - - for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { -- iotable_init(cns3xxx_pcie[i].cfg_bases, -- ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases)); - cns3xxx_pcie_check_link(&cns3xxx_pcie[i]); -- cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); -- pci_common_init(&cns3xxx_pcie[i].hw_pci); -+ if (cns3xxx_pcie[i].linked) { -+ cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]); -+ pci_common_init(&cns3xxx_pcie[i].hw_pci); -+ } - } - - pci_assign_unassigned_resources(); - - return 0; - } --device_initcall(cns3xxx_pcie_init); diff --git a/target/linux/cns3xxx/patches-3.3/070-i2c_support.patch b/target/linux/cns3xxx/patches-3.3/070-i2c_support.patch deleted file mode 100644 index df7ceac..0000000 --- a/target/linux/cns3xxx/patches-3.3/070-i2c_support.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -326,6 +326,18 @@ config I2C_BLACKFIN_TWI_CLK_KHZ - help - The unit of the TWI clock is kHz. - -+config I2C_CNS3XXX -+ tristate "Cavium CNS3xxx I2C driver" -+ depends on ARCH_CNS3XXX -+ help -+ Support for Cavium CNS3xxx I2C controller driver. -+ -+ This driver can also be built as a module. If so, the module -+ will be called i2c-cns3xxx. -+ -+ Please note that this driver might be needed to bring up other -+ devices such as Cavium CNS3xxx Ethernet. -+ - config I2C_CPM - tristate "Freescale CPM1 or CPM2 (MPC8xx/826x)" - depends on (CPM1 || CPM2) && OF_I2C ---- a/drivers/i2c/busses/Makefile -+++ b/drivers/i2c/busses/Makefile -@@ -83,6 +83,7 @@ obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor - obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o - obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o - obj-$(CONFIG_I2C_STUB) += i2c-stub.o -+obj-$(CONFIG_I2C_CNS3XXX) += i2c-cns3xxx.o - obj-$(CONFIG_SCx200_ACB) += scx200_acb.o - obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o - diff --git a/target/linux/cns3xxx/patches-3.3/075-spi_support.patch b/target/linux/cns3xxx/patches-3.3/075-spi_support.patch deleted file mode 100644 index bc1958d..0000000 --- a/target/linux/cns3xxx/patches-3.3/075-spi_support.patch +++ /dev/null @@ -1,57 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -117,6 +117,13 @@ config SPI_BUTTERFLY - inexpensive battery powered microcontroller evaluation board. - This same cable can be used to flash new firmware. - -+config SPI_CNS3XXX -+ tristate "CNS3XXX SPI controller" -+ depends on ARCH_CNS3XXX && SPI_MASTER -+ select SPI_BITBANG -+ help -+ This enables using the CNS3XXX SPI controller in master mode. -+ - config SPI_COLDFIRE_QSPI - tristate "Freescale Coldfire QSPI controller" - depends on (M520x || M523x || M5249 || M527x || M528x || M532x) ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -18,6 +18,7 @@ obj-$(CONFIG_SPI_BFIN) += spi-bfin5xx. - obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o - obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o - obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o -+obj-$(CONFIG_SPI_CNS3XXX) += spi-cns3xxx.o - obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o - obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o - obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o ---- a/drivers/spi/spi-bitbang.c -+++ b/drivers/spi/spi-bitbang.c -@@ -330,6 +330,12 @@ static void bitbang_work(struct work_str - */ - if (!m->is_dma_mapped) - t->rx_dma = t->tx_dma = 0; -+ -+ if (t->transfer_list.next == &m->transfers) -+ t->last_in_message_list = 1; -+ else -+ t->last_in_message_list = 0; -+ - status = bitbang->txrx_bufs(spi, t); - } - if (status > 0) ---- a/include/linux/spi/spi.h -+++ b/include/linux/spi/spi.h -@@ -508,6 +508,13 @@ struct spi_transfer { - u32 speed_hz; - - struct list_head transfer_list; -+ -+#ifdef CONFIG_ARCH_CNS3XXX -+ unsigned last_in_message_list; -+#ifdef CONFIG_SPI_CNS3XXX_2IOREAD -+ u8 dio_read; -+#endif -+#endif - }; - - /** diff --git a/target/linux/cns3xxx/patches-3.3/080-sata_support.patch b/target/linux/cns3xxx/patches-3.3/080-sata_support.patch deleted file mode 100644 index e614385..0000000 --- a/target/linux/cns3xxx/patches-3.3/080-sata_support.patch +++ /dev/null @@ -1,97 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/devices.c -+++ b/arch/arm/mach-cns3xxx/devices.c -@@ -41,7 +41,7 @@ static struct resource cns3xxx_ahci_reso - static u64 cns3xxx_ahci_dmamask = DMA_BIT_MASK(32); - - static struct platform_device cns3xxx_ahci_pdev = { -- .name = "ahci", -+ .name = "ahci-cns3xxx", - .id = 0, - .resource = cns3xxx_ahci_resource, - .num_resources = ARRAY_SIZE(cns3xxx_ahci_resource), ---- a/drivers/ata/ahci_platform.c -+++ b/drivers/ata/ahci_platform.c -@@ -27,6 +27,7 @@ enum ahci_type { - AHCI, /* standard platform ahci */ - IMX53_AHCI, /* ahci on i.mx53 */ - STRICT_AHCI, /* delayed DMA engine start */ -+ CNS3XXX_AHCI, /* AHCI on cns3xxx */ - }; - - static struct platform_device_id ahci_devtype[] = { -@@ -40,11 +41,32 @@ static struct platform_device_id ahci_de - .name = "strict-ahci", - .driver_data = STRICT_AHCI, - }, { -+ .name = "ahci-cns3xxx", -+ .driver_data = CNS3XXX_AHCI, -+ }, { - /* sentinel */ - } - }; - MODULE_DEVICE_TABLE(platform, ahci_devtype); - -+static int -+cns3xxx_ahci_softreset(struct ata_link *link, unsigned int *class, -+ unsigned long deadline) -+{ -+ int pmp = sata_srst_pmp(link); -+ int ret; -+ -+ ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); -+ if (pmp && ret) -+ return ahci_do_softreset(link, class, 0, deadline, -+ ahci_check_ready); -+ return ret; -+} -+ -+static struct ata_port_operations cns3xxx_ahci_ops = { -+ .inherits = &ahci_ops, -+ .softreset = cns3xxx_ahci_softreset, -+}; - - static const struct ata_port_info ahci_port_info[] = { - /* by features */ -@@ -67,13 +89,19 @@ static const struct ata_port_info ahci_p - .udma_mask = ATA_UDMA6, - .port_ops = &ahci_ops, - }, -+ [CNS3XXX_AHCI] = { -+ .flags = AHCI_FLAG_COMMON, -+ .pio_mask = ATA_PIO4, -+ .udma_mask = ATA_UDMA6, -+ .port_ops = &cns3xxx_ahci_ops, -+ } - }; - - static struct scsi_host_template ahci_platform_sht = { - AHCI_SHT("ahci_platform"), - }; - --static int __init ahci_probe(struct platform_device *pdev) -+static int __devinit ahci_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; - struct ahci_platform_data *pdata = dev_get_platdata(dev); -@@ -285,6 +313,7 @@ static const struct of_device_id ahci_of - MODULE_DEVICE_TABLE(of, ahci_of_match); - - static struct platform_driver ahci_driver = { -+ .probe = ahci_probe, - .remove = __devexit_p(ahci_remove), - .driver = { - .name = "ahci", -@@ -299,7 +328,7 @@ static struct platform_driver ahci_drive - - static int __init ahci_init(void) - { -- return platform_driver_probe(&ahci_driver, ahci_probe); -+ return platform_driver_register(&ahci_driver); - } - module_init(ahci_init); - -@@ -312,4 +341,3 @@ module_exit(ahci_exit); - MODULE_DESCRIPTION("AHCI SATA platform driver"); - MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>"); - MODULE_LICENSE("GPL"); --MODULE_ALIAS("platform:ahci"); diff --git a/target/linux/cns3xxx/patches-3.3/085-ethernet_support.patch b/target/linux/cns3xxx/patches-3.3/085-ethernet_support.patch deleted file mode 100644 index 84548a3..0000000 --- a/target/linux/cns3xxx/patches-3.3/085-ethernet_support.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/drivers/net/ethernet/Kconfig -+++ b/drivers/net/ethernet/Kconfig -@@ -32,6 +32,7 @@ source "drivers/net/ethernet/calxeda/Kco - source "drivers/net/ethernet/chelsio/Kconfig" - source "drivers/net/ethernet/cirrus/Kconfig" - source "drivers/net/ethernet/cisco/Kconfig" -+source "drivers/net/ethernet/cavium/Kconfig" - source "drivers/net/ethernet/davicom/Kconfig" - - config DNET ---- a/drivers/net/ethernet/Makefile -+++ b/drivers/net/ethernet/Makefile -@@ -15,6 +15,7 @@ obj-$(CONFIG_NET_BFIN) += adi/ - obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/ - obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/ - obj-$(CONFIG_NET_CALXEDA_XGMAC) += calxeda/ -+obj-$(CONFIG_NET_VENDOR_CAVIUM) += cavium/ - obj-$(CONFIG_NET_VENDOR_CHELSIO) += chelsio/ - obj-$(CONFIG_NET_VENDOR_CIRRUS) += cirrus/ - obj-$(CONFIG_NET_VENDOR_CISCO) += cisco/ diff --git a/target/linux/cns3xxx/patches-3.3/090-timers.patch b/target/linux/cns3xxx/patches-3.3/090-timers.patch deleted file mode 100644 index 9adf007..0000000 --- a/target/linux/cns3xxx/patches-3.3/090-timers.patch +++ /dev/null @@ -1,109 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -125,12 +125,13 @@ static void cns3xxx_timer_set_mode(enum - - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: -- reload = pclk * 20 / (3 * HZ) * 0x25000; -+ reload = pclk * 1000000 / HZ; - writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); - ctrl |= (1 << 0) | (1 << 2) | (1 << 9); - break; - case CLOCK_EVT_MODE_ONESHOT: - /* period set, and timer enabled in 'next_event' hook */ -+ writel(0, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); - ctrl |= (1 << 2) | (1 << 9); - break; - case CLOCK_EVT_MODE_UNUSED: -@@ -155,11 +156,11 @@ static int cns3xxx_timer_set_next_event( - - static struct clock_event_device cns3xxx_tmr1_clockevent = { - .name = "cns3xxx timer1", -- .shift = 8, -+ .shift = 32, - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .set_mode = cns3xxx_timer_set_mode, - .set_next_event = cns3xxx_timer_set_next_event, -- .rating = 350, -+ .rating = 300, - .cpumask = cpu_all_mask, - }; - -@@ -201,6 +202,35 @@ static struct irqaction cns3xxx_timer_ir - .handler = cns3xxx_timer_interrupt, - }; - -+static cycle_t cns3xxx_get_cycles(struct clocksource *cs) -+{ -+ u64 val; -+ -+ val = readl(cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET); -+ val &= 0xffff; -+ -+ return ((val << 32) | readl(cns3xxx_tmr1 + TIMER_FREERUN_OFFSET)); -+} -+ -+static struct clocksource clocksource_cns3xxx = { -+ .name = "freerun", -+ .rating = 200, -+ .read = cns3xxx_get_cycles, -+ .mask = CLOCKSOURCE_MASK(48), -+ .shift = 16, -+ .flags = CLOCK_SOURCE_IS_CONTINUOUS, -+}; -+ -+static void __init cns3xxx_clocksource_init(void) -+{ -+ /* Reset the FreeRunning counter */ -+ writel((1 << 16), cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET); -+ -+ clocksource_cns3xxx.mult = -+ clocksource_khz2mult(100, clocksource_cns3xxx.shift); -+ clocksource_register(&clocksource_cns3xxx); -+} -+ - /* - * Set up the clock source and clock events devices - */ -@@ -218,13 +248,12 @@ static void __init __cns3xxx_timer_init( - /* stop free running timer3 */ - writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET); - -- /* timer1 */ -- writel(0x5C800, cns3xxx_tmr1 + TIMER1_COUNTER_OFFSET); -- writel(0x5C800, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); -- - writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V1_OFFSET); - writel(0, cns3xxx_tmr1 + TIMER1_MATCH_V2_OFFSET); - -+ val = (cns3xxx_cpu_clock() >> 3) * 1000000 / HZ; -+ writel(val, cns3xxx_tmr1 + TIMER1_COUNTER_OFFSET); -+ - /* mask irq, non-mask timer1 overflow */ - irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); - irq_mask &= ~(1 << 2); -@@ -236,23 +265,9 @@ static void __init __cns3xxx_timer_init( - val |= (1 << 9); - writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); - -- /* timer2 */ -- writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V1_OFFSET); -- writel(0, cns3xxx_tmr1 + TIMER2_MATCH_V2_OFFSET); -- -- /* mask irq */ -- irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); -- irq_mask |= ((1 << 3) | (1 << 4) | (1 << 5)); -- writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); -- -- /* down counter */ -- val = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); -- val |= (1 << 10); -- writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); -- -- /* Make irqs happen for the system timer */ - setup_irq(timer_irq, &cns3xxx_timer_irq); - -+ cns3xxx_clocksource_init(); - cns3xxx_clockevents_init(timer_irq); - } - diff --git a/target/linux/cns3xxx/patches-3.3/095-gpio_support.patch b/target/linux/cns3xxx/patches-3.3/095-gpio_support.patch deleted file mode 100644 index 4364abf..0000000 --- a/target/linux/cns3xxx/patches-3.3/095-gpio_support.patch +++ /dev/null @@ -1,74 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/cns3420vb.c -+++ b/arch/arm/mach-cns3xxx/cns3420vb.c -@@ -198,6 +198,10 @@ static void __init cns3420_init(void) - - cns3xxx_ahci_init(); - cns3xxx_sdhci_init(); -+ cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA, -+ NR_IRQS_CNS3XXX); -+ cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB, -+ NR_IRQS_CNS3XXX + 32); - - pm_power_off = cns3xxx_power_off; - } -@@ -213,7 +217,7 @@ static struct map_desc cns3420_io_desc[] - - static void __init cns3420_map_io(void) - { -- cns3xxx_map_io(); -+ cns3xxx_common_init(); - cns3xxx_pcie_iotable_init(); - iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc)); - ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -82,7 +82,7 @@ static struct map_desc cns3xxx_io_desc[] - }, - }; - --void __init cns3xxx_map_io(void) -+void __init cns3xxx_common_init(void) - { - #ifdef CONFIG_LOCAL_TIMERS - twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT; ---- a/arch/arm/mach-cns3xxx/core.h -+++ b/arch/arm/mach-cns3xxx/core.h -@@ -21,7 +21,7 @@ void __init cns3xxx_l2x0_init(void); - static inline void cns3xxx_l2x0_init(void) {} - #endif /* CONFIG_CACHE_L2X0 */ - --void __init cns3xxx_map_io(void); -+void __init cns3xxx_common_init(void); - void __init cns3xxx_init_irq(void); - int __init cns3xxx_pcie_init(void); - void cns3xxx_power_off(void); ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -366,6 +366,8 @@ config ARCH_CLPS711X - config ARCH_CNS3XXX - bool "Cavium Networks CNS3XXX family" - select CPU_V6K -+ select ARCH_REQUIRE_GPIOLIB -+ select GENERIC_IRQ_CHIP - select GENERIC_CLOCKEVENTS - select ARM_GIC - select CLKDEV_LOOKUP ---- a/arch/arm/mach-cns3xxx/Makefile -+++ b/arch/arm/mach-cns3xxx/Makefile -@@ -1,4 +1,4 @@ --obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o -+obj-$(CONFIG_ARCH_CNS3XXX) += core.o gpio.o pm.o devices.o - obj-$(CONFIG_PCI) += pcie.o - obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o - obj-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o ---- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h -+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h -@@ -627,7 +627,7 @@ int cns3xxx_cpu_clock(void); - - #if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX) - #undef NR_IRQS --#define NR_IRQS NR_IRQS_CNS3XXX -+#define NR_IRQS (NR_IRQS_CNS3XXX + 64) - #endif - - #endif /* __MACH_BOARD_CNS3XXX_H */ diff --git a/target/linux/cns3xxx/patches-3.3/097-l2x0_cmdline_disable.patch b/target/linux/cns3xxx/patches-3.3/097-l2x0_cmdline_disable.patch deleted file mode 100644 index 87b1090..0000000 --- a/target/linux/cns3xxx/patches-3.3/097-l2x0_cmdline_disable.patch +++ /dev/null @@ -1,47 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/core.c -+++ b/arch/arm/mach-cns3xxx/core.c -@@ -284,11 +284,24 @@ struct sys_timer cns3xxx_timer = { - - #ifdef CONFIG_CACHE_L2X0 - -+static int cns3xxx_l2x0_enable = 1; -+ -+static int __init cns3xxx_l2x0_disable(char *s) -+{ -+ cns3xxx_l2x0_enable = 0; -+ return 1; -+} -+__setup("nol2x0", cns3xxx_l2x0_disable); -+ - void __init cns3xxx_l2x0_init(void) - { -- void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); -+ void __iomem *base; - u32 val; - -+ if (!cns3xxx_l2x0_enable) -+ return; -+ -+ base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); - if (WARN_ON(!base)) - return; - -@@ -321,6 +334,7 @@ void __init cns3xxx_l2x0_init(void) - /* 32 KiB, 8-way, parity disable */ - l2x0_init(base, 0x00540000, 0xfe000fff); - } -+arch_initcall(cns3xxx_l2x0_init); - - #endif /* CONFIG_CACHE_L2X0 */ - ---- a/arch/arm/mach-cns3xxx/cns3420vb.c -+++ b/arch/arm/mach-cns3xxx/cns3420vb.c -@@ -193,8 +193,6 @@ static struct platform_device *cns3420_p - - static void __init cns3420_init(void) - { -- cns3xxx_l2x0_init(); -- - platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); - - cns3xxx_ahci_init(); diff --git a/target/linux/cns3xxx/patches-3.3/200-dwc_otg_support.patch b/target/linux/cns3xxx/patches-3.3/200-dwc_otg_support.patch deleted file mode 100644 index 361c08a..0000000 --- a/target/linux/cns3xxx/patches-3.3/200-dwc_otg_support.patch +++ /dev/null @@ -1,58 +0,0 @@ ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -71,6 +71,7 @@ obj-$(CONFIG_PARIDE) += block/paride/ - obj-$(CONFIG_TC) += tc/ - obj-$(CONFIG_UWB) += uwb/ - obj-$(CONFIG_USB_OTG_UTILS) += usb/ -+obj-$(CONFIG_USB_DWC_OTG) += usb/dwc/ - obj-$(CONFIG_USB) += usb/ - obj-$(CONFIG_PCI) += usb/ - obj-$(CONFIG_USB_GADGET) += usb/ ---- a/drivers/usb/Kconfig -+++ b/drivers/usb/Kconfig -@@ -134,6 +134,8 @@ source "drivers/usb/musb/Kconfig" - - source "drivers/usb/renesas_usbhs/Kconfig" - -+source "drivers/usb/dwc/Kconfig" -+ - source "drivers/usb/class/Kconfig" - - source "drivers/usb/storage/Kconfig" ---- a/drivers/usb/core/urb.c -+++ b/drivers/usb/core/urb.c -@@ -17,7 +17,11 @@ static void urb_destroy(struct kref *kre - - if (urb->transfer_flags & URB_FREE_BUFFER) - kfree(urb->transfer_buffer); -- -+ if (urb->aligned_transfer_buffer) { -+ kfree(urb->aligned_transfer_buffer); -+ urb->aligned_transfer_buffer = 0; -+ urb->aligned_transfer_dma = 0; -+ } - kfree(urb); - } - ---- a/include/linux/usb.h -+++ b/include/linux/usb.h -@@ -1234,6 +1234,9 @@ struct urb { - unsigned int transfer_flags; /* (in) URB_SHORT_NOT_OK | ...*/ - void *transfer_buffer; /* (in) associated data buffer */ - dma_addr_t transfer_dma; /* (in) dma addr for transfer_buffer */ -+ void *aligned_transfer_buffer; /* (in) associeated data buffer */ -+ dma_addr_t aligned_transfer_dma;/* (in) dma addr for transfer_buffer */ -+ u32 aligned_transfer_buffer_length; /* (in) data buffer length */ - struct scatterlist *sg; /* (in) scatter gather buffer list */ - int num_mapped_sgs; /* (internal) mapped sg entries */ - int num_sgs; /* (in) number of entries in the sg list */ ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -125,6 +125,7 @@ config USB_GADGET_STORAGE_NUM_BUFFERS - # - choice - prompt "USB Peripheral Controller" -+ depends on !USB_DWC_OTG - help - A USB device uses a controller to talk to its host. - Systems should have only one such upstream link. diff --git a/target/linux/cns3xxx/patches-3.3/300-laguna_support.patch b/target/linux/cns3xxx/patches-3.3/300-laguna_support.patch deleted file mode 100644 index 544fb5f..0000000 --- a/target/linux/cns3xxx/patches-3.3/300-laguna_support.patch +++ /dev/null @@ -1,48 +0,0 @@ ---- a/arch/arm/mach-cns3xxx/Kconfig -+++ b/arch/arm/mach-cns3xxx/Kconfig -@@ -10,4 +10,12 @@ config MACH_CNS3420VB - This is a platform with an on-board ARM11 MPCore and has support - for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc. - -+config MACH_GW2388 -+ bool "Support for Gateworks Laguna Platform" -+ help -+ Include support for the Gateworks Laguna Platform -+ -+ This is a platform with an on-board ARM11 MPCore and has support -+ for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, I2C, GIG, etc. -+ - endmenu ---- a/arch/arm/mach-cns3xxx/Makefile -+++ b/arch/arm/mach-cns3xxx/Makefile -@@ -1,6 +1,7 @@ - obj-$(CONFIG_ARCH_CNS3XXX) += core.o gpio.o pm.o devices.o - obj-$(CONFIG_PCI) += pcie.o - obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o -+obj-$(CONFIG_MACH_GW2388) += laguna.o - obj-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o - obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o - obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o ---- a/arch/arm/mach-cns3xxx/devices.c -+++ b/arch/arm/mach-cns3xxx/devices.c -@@ -19,6 +19,7 @@ - #include <mach/cns3xxx.h> - #include <mach/irqs.h> - #include <mach/pm.h> -+#include <asm/mach-types.h> - #include "core.h" - #include "devices.h" - -@@ -102,7 +103,11 @@ void __init cns3xxx_sdhci_init(void) - u32 gpioa_pins = __raw_readl(gpioa); - - /* MMC/SD pins share with GPIOA */ -- gpioa_pins |= 0x1fff0004; -+ if (machine_is_gw2388()) { -+ gpioa_pins |= 0x1fff0000; -+ } else { -+ gpioa_pins |= 0x1fff0004; -+ } - __raw_writel(gpioa_pins, gpioa); - - cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO)); diff --git a/target/linux/cns3xxx/patches-3.3/305-laguna_sdhci_card_detect.patch b/target/linux/cns3xxx/patches-3.3/305-laguna_sdhci_card_detect.patch deleted file mode 100644 index 444c5d5..0000000 --- a/target/linux/cns3xxx/patches-3.3/305-laguna_sdhci_card_detect.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- a/drivers/mmc/host/sdhci-cns3xxx.c -+++ b/drivers/mmc/host/sdhci-cns3xxx.c -@@ -89,10 +89,11 @@ static struct sdhci_pltfm_data sdhci_cns - .ops = &sdhci_cns3xxx_ops, - .quirks = SDHCI_QUIRK_BROKEN_DMA | - SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | -- SDHCI_QUIRK_INVERTED_WRITE_PROTECT | -+ //SDHCI_QUIRK_INVERTED_WRITE_PROTECT | - SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | - SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | -- SDHCI_QUIRK_NONSTANDARD_CLOCK, -+ SDHCI_QUIRK_NONSTANDARD_CLOCK | -+ SDHCI_QUIRK_BROKEN_CARD_DETECTION, - }; - - static int __devinit sdhci_cns3xxx_probe(struct platform_device *pdev) |