diff options
Diffstat (limited to 'target/linux/generic/patches-3.13/025-bcma_backport.patch')
| -rw-r--r-- | target/linux/generic/patches-3.13/025-bcma_backport.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/target/linux/generic/patches-3.13/025-bcma_backport.patch b/target/linux/generic/patches-3.13/025-bcma_backport.patch index e5c7e75..49f33ad 100644 --- a/target/linux/generic/patches-3.13/025-bcma_backport.patch +++ b/target/linux/generic/patches-3.13/025-bcma_backport.patch @@ -603,6 +603,35 @@ #include <linux/bcma/bcma_driver_mips.h> #include <linux/bcma/bcma_driver_gmac_cmn.h> #include <linux/ssb/ssb.h> /* SPROM sharing */ +@@ -72,17 +73,17 @@ struct bcma_host_ops { + /* Core-ID values. */ + #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ + #define BCMA_CORE_4706_CHIPCOMMON 0x500 +-#define BCMA_CORE_PCIEG2 0x501 +-#define BCMA_CORE_DMA 0x502 +-#define BCMA_CORE_SDIO3 0x503 +-#define BCMA_CORE_USB20 0x504 +-#define BCMA_CORE_USB30 0x505 +-#define BCMA_CORE_A9JTAG 0x506 +-#define BCMA_CORE_DDR23 0x507 +-#define BCMA_CORE_ROM 0x508 +-#define BCMA_CORE_NAND 0x509 +-#define BCMA_CORE_QSPI 0x50A +-#define BCMA_CORE_CHIPCOMMON_B 0x50B ++#define BCMA_CORE_NS_PCIEG2 0x501 ++#define BCMA_CORE_NS_DMA 0x502 ++#define BCMA_CORE_NS_SDIO3 0x503 ++#define BCMA_CORE_NS_USB20 0x504 ++#define BCMA_CORE_NS_USB30 0x505 ++#define BCMA_CORE_NS_A9JTAG 0x506 ++#define BCMA_CORE_NS_DDR23 0x507 ++#define BCMA_CORE_NS_ROM 0x508 ++#define BCMA_CORE_NS_NAND 0x509 ++#define BCMA_CORE_NS_QSPI 0x50A ++#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B + #define BCMA_CORE_4706_SOC_RAM 0x50E + #define BCMA_CORE_ARMCA9 0x510 + #define BCMA_CORE_4706_MAC_GBIT 0x52D @@ -157,6 +158,9 @@ struct bcma_host_ops { /* Chip IDs of PCIe devices */ #define BCMA_CHIP_ID_BCM4313 0x4313 @@ -808,3 +837,34 @@ +void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2); + +#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */ +--- a/drivers/bcma/scan.c ++++ b/drivers/bcma/scan.c +@@ -32,17 +32,17 @@ static const struct bcma_device_id_name + { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" }, + { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" }, + { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" }, +- { BCMA_CORE_PCIEG2, "PCIe Gen 2" }, +- { BCMA_CORE_DMA, "DMA" }, +- { BCMA_CORE_SDIO3, "SDIO3" }, +- { BCMA_CORE_USB20, "USB 2.0" }, +- { BCMA_CORE_USB30, "USB 3.0" }, +- { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" }, +- { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" }, +- { BCMA_CORE_ROM, "ROM" }, +- { BCMA_CORE_NAND, "NAND flash controller" }, +- { BCMA_CORE_QSPI, "SPI flash controller" }, +- { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" }, ++ { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" }, ++ { BCMA_CORE_NS_DMA, "DMA" }, ++ { BCMA_CORE_NS_SDIO3, "SDIO3" }, ++ { BCMA_CORE_NS_USB20, "USB 2.0" }, ++ { BCMA_CORE_NS_USB30, "USB 3.0" }, ++ { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" }, ++ { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" }, ++ { BCMA_CORE_NS_ROM, "ROM" }, ++ { BCMA_CORE_NS_NAND, "NAND flash controller" }, ++ { BCMA_CORE_NS_QSPI, "SPI flash controller" }, ++ { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" }, + { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" }, + { BCMA_CORE_AMEMC, "AMEMC (DDR)" }, + { BCMA_CORE_ALTA, "ALTA (I2S)" }, |