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Diffstat (limited to 'target/linux/generic/patches-4.9/061-v4.10-0002-mtd-spi-nor-fix-spansion-quad-enable.patch')
-rw-r--r--target/linux/generic/patches-4.9/061-v4.10-0002-mtd-spi-nor-fix-spansion-quad-enable.patch42
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/generic/patches-4.9/061-v4.10-0002-mtd-spi-nor-fix-spansion-quad-enable.patch b/target/linux/generic/patches-4.9/061-v4.10-0002-mtd-spi-nor-fix-spansion-quad-enable.patch
new file mode 100644
index 0000000..cd0aa46
--- /dev/null
+++ b/target/linux/generic/patches-4.9/061-v4.10-0002-mtd-spi-nor-fix-spansion-quad-enable.patch
@@ -0,0 +1,42 @@
+From 807c16253319ee6ccf8873ae64f070f7eb532cd5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Jo=C3=ABl=20Esponde?= <joel.esponde@honeywell.com>
+Date: Wed, 23 Nov 2016 12:47:40 +0100
+Subject: [PATCH] mtd: spi-nor: fix spansion quad enable
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+With the S25FL127S nor flash part, each writing to the configuration
+register takes hundreds of ms. During that time, no more accesses to
+the flash should be done (even reads).
+
+This commit adds a wait loop after the register writing until the flash
+finishes its work.
+
+This issue could make rootfs mounting fail when the latter was done too
+much closely to this quad enable bit setting step. And in this case, a
+driver as UBIFS may try to recover the filesystem and may broke it
+completely.
+
+Signed-off-by: Joël Esponde <joel.esponde@honeywell.com>
+Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
+---
+ drivers/mtd/spi-nor/spi-nor.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -1256,6 +1256,13 @@ static int spansion_quad_enable(struct s
+ return -EINVAL;
+ }
+
++ ret = spi_nor_wait_till_ready(nor);
++ if (ret) {
++ dev_err(nor->dev,
++ "timeout while writing configuration register\n");
++ return ret;
++ }
++
+ /* read back and check it */
+ ret = read_cr(nor);
+ if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) {