diff options
Diffstat (limited to 'target/linux/generic/patches-4.9/076-v4.11-0004-net-phy-bcm7xxx-Implement-EGPHY-workaround-for-7278.patch')
| -rw-r--r-- | target/linux/generic/patches-4.9/076-v4.11-0004-net-phy-bcm7xxx-Implement-EGPHY-workaround-for-7278.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/target/linux/generic/patches-4.9/076-v4.11-0004-net-phy-bcm7xxx-Implement-EGPHY-workaround-for-7278.patch b/target/linux/generic/patches-4.9/076-v4.11-0004-net-phy-bcm7xxx-Implement-EGPHY-workaround-for-7278.patch new file mode 100644 index 0000000..7aa4ee2 --- /dev/null +++ b/target/linux/generic/patches-4.9/076-v4.11-0004-net-phy-bcm7xxx-Implement-EGPHY-workaround-for-7278.patch @@ -0,0 +1,68 @@ +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Fri, 20 Jan 2017 12:36:34 -0800 +Subject: [PATCH] net: phy: bcm7xxx: Implement EGPHY workaround for 7278 + +Implement the HW design team recommended workaround in for 7278. Since +the GPHY now returns its revision information in MII_PHYS_ID[23] we need +to check whether the revision provided in flags is 0 or not. + +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + +--- a/drivers/net/phy/bcm7xxx.c ++++ b/drivers/net/phy/bcm7xxx.c +@@ -163,12 +163,43 @@ static int bcm7xxx_28nm_e0_plus_afe_conf + return 0; + } + ++static int bcm7xxx_28nm_a0_patch_afe_config_init(struct phy_device *phydev) ++{ ++ /* +1 RC_CAL codes for RL centering for both LT and HT conditions */ ++ bcm_phy_write_misc(phydev, AFE_RXCONFIG_2, 0xd003); ++ ++ /* Cut master bias current by 2% to compensate for RC_CAL offset */ ++ bcm_phy_write_misc(phydev, DSP_TAP10, 0x791b); ++ ++ /* Improve hybrid leakage */ ++ bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x10e3); ++ ++ /* Change rx_on_tune 8 to 0xf */ ++ bcm_phy_write_misc(phydev, 0x21, 0x2, 0x87f6); ++ ++ /* Change 100Tx EEE bandwidth */ ++ bcm_phy_write_misc(phydev, 0x22, 0x2, 0x017d); ++ ++ /* Enable ffe zero detection for Vitesse interoperability */ ++ bcm_phy_write_misc(phydev, 0x26, 0x2, 0x0015); ++ ++ r_rc_cal_reset(phydev); ++ ++ return 0; ++} ++ + static int bcm7xxx_28nm_config_init(struct phy_device *phydev) + { + u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags); + u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags); + int ret = 0; + ++ /* Newer devices have moved the revision information back into a ++ * standard location in MII_PHYS_ID[23] ++ */ ++ if (rev == 0) ++ rev = phydev->phy_id & ~phydev->drv->phy_id_mask; ++ + pr_info_once("%s: %s PHY revision: 0x%02x, patch: %d\n", + phydev_name(phydev), phydev->drv->name, rev, patch); + +@@ -192,6 +223,9 @@ static int bcm7xxx_28nm_config_init(stru + case 0x10: + ret = bcm7xxx_28nm_e0_plus_afe_config_init(phydev); + break; ++ case 0x01: ++ ret = bcm7xxx_28nm_a0_patch_afe_config_init(phydev); ++ break; + default: + break; + } |