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Diffstat (limited to 'target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch')
-rw-r--r--target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch115
1 files changed, 115 insertions, 0 deletions
diff --git a/target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch b/target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
new file mode 100644
index 0000000..105cb71
--- /dev/null
+++ b/target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
@@ -0,0 +1,115 @@
+From 3f7fbfad3edc92227b9ae91050837a6d1de374f5 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Tue, 22 Oct 2013 21:51:25 -0700
+Subject: [PATCH] ARM: dts: added several new imx-pinmux groups
+
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+---
+ arch/arm/boot/dts/imx6qdl.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 60 insertions(+)
+
+--- a/arch/arm/boot/dts/imx6qdl.dtsi
++++ b/arch/arm/boot/dts/imx6qdl.dtsi
+@@ -639,6 +639,14 @@
+ MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
+ >;
+ };
++
++ pinctrl_audmux_4: audmux-4 {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x80000000
++ MX6QDL_PAD_EIM_D25__AUD5_RXC 0x80000000
++ MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
++ >;
++ };
+ };
+
+ ecspi1 {
+@@ -811,6 +819,28 @@
+ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
+ >;
+ };
++
++ /* No Strobe */
++ pinctrl_gpmi_nand_2: gpmi-nand-2 {
++ fsl,pins = <
++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
++ >;
++ };
+ };
+
+ hdmi_hdcp {
+@@ -1058,6 +1088,13 @@
+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+ >;
+ };
++
++ pinctrl_uart1_2: uart1grp-2 {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
++ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
++ >;
++ };
+ };
+
+ uart2 {
+@@ -1076,6 +1113,13 @@
+ MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
+ >;
+ };
++
++ pinctrl_uart2_3: uart2grp-3 {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
++ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
++ >;
++ };
+ };
+
+ uart3 {
+@@ -1096,6 +1140,13 @@
+ MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
+ >;
+ };
++
++ pinctrl_uart3_3: uart3grp-3 {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
++ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
++ >;
++ };
+ };
+
+ uart4 {
+@@ -1107,6 +1158,15 @@
+ };
+ };
+
++ uart5 {
++ pinctrl_uart5_1: uart5grp-1 {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
++ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
++ >;
++ };
++ };
++
+ usbotg {
+ pinctrl_usbotg_1: usbotggrp-1 {
+ fsl,pins = <