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path: root/target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch
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Diffstat (limited to 'target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch')
-rw-r--r--target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch239
1 files changed, 239 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch b/target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch
new file mode 100644
index 0000000..4cab66b
--- /dev/null
+++ b/target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch
@@ -0,0 +1,239 @@
+From 633f0e08498aebfdb932bd71319b4cb136709499 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Tue, 24 Jul 2018 14:45:49 +0200
+Subject: [PATCH 2/3] phy: qcom-ipq4019-usb: add driver for QCOM/IPQ4019
+
+Add a driver to setup the USB phy on Qualcom Dakota SoCs.
+The driver sets up HS and SS phys. In case of HS some magic values need to
+be written to magic offsets. These were taken from the SDK driver.
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ drivers/phy/qualcomm/Kconfig | 7 ++
+ drivers/phy/qualcomm/Makefile | 1 +
+ drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 188 ++++++++++++++++++++++++++++
+ 3 files changed, 196 insertions(+)
+ create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
+
+Index: linux-4.14.54/drivers/phy/qualcomm/Kconfig
+===================================================================
+--- linux-4.14.54.orig/drivers/phy/qualcomm/Kconfig
++++ linux-4.14.54/drivers/phy/qualcomm/Kconfig
+@@ -8,6 +8,13 @@ config PHY_QCOM_APQ8064_SATA
+ depends on OF
+ select GENERIC_PHY
+
++config PHY_QCOM_IPQ4019_USB
++ tristate "Qualcomm IPQ4019 USB PHY module"
++ depends on OF && ARCH_QCOM
++ select GENERIC_PHY
++ help
++ Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
++
+ config PHY_QCOM_IPQ806X_SATA
+ tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
+ depends on ARCH_QCOM
+Index: linux-4.14.54/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
+===================================================================
+--- /dev/null
++++ linux-4.14.54/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
+@@ -0,0 +1,188 @@
++/*
++ * Copyright (C) 2018 John Crispin <john@phrozen.org>
++ *
++ * Based on code from
++ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/mutex.h>
++#include <linux/of_platform.h>
++#include <linux/phy/phy.h>
++#include <linux/platform_device.h>
++#include <linux/reset.h>
++
++/*
++ * Magic registers copied from the SDK driver code
++ */
++#define PHY_CTRL0_ADDR 0x000
++#define PHY_CTRL1_ADDR 0x004
++#define PHY_CTRL2_ADDR 0x008
++#define PHY_CTRL3_ADDR 0x00C
++#define PHY_CTRL4_ADDR 0x010
++#define PHY_MISC_ADDR 0x024
++#define PHY_IPG_ADDR 0x030
++
++#define PHY_CTRL0_VAL 0xA4600015
++#define PHY_CTRL1_VAL 0x09500000
++#define PHY_CTRL2_VAL 0x00058180
++#define PHY_CTRL3_VAL 0x6DB6DCD6
++#define PHY_CTRL4_VAL 0x836DB6DB
++#define PHY_MISC_VAL 0x3803FB0C
++#define PHY_IPG_VAL 0x47323232
++
++struct ipq4019_usb_phy {
++ struct device *dev;
++ struct phy *phy;
++ void __iomem *base;
++ struct reset_control *por_rst;
++ struct reset_control *srif_rst;
++};
++
++static int ipq4019_ss_phy_power_off(struct phy *_phy)
++{
++ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
++
++ reset_control_assert(phy->por_rst);
++ msleep(10);
++
++ return 0;
++}
++
++static int ipq4019_ss_phy_power_on(struct phy *_phy)
++{
++ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
++
++ ipq4019_ss_phy_power_off(_phy);
++
++ reset_control_deassert(phy->por_rst);
++
++ return 0;
++}
++
++static struct phy_ops ipq4019_usb_ss_phy_ops = {
++ .power_on = ipq4019_ss_phy_power_on,
++ .power_off = ipq4019_ss_phy_power_off,
++};
++
++static int ipq4019_hs_phy_power_off(struct phy *_phy)
++{
++ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
++
++ reset_control_assert(phy->por_rst);
++ msleep(10);
++
++ reset_control_assert(phy->srif_rst);
++ msleep(10);
++
++ return 0;
++}
++
++static int ipq4019_hs_phy_power_on(struct phy *_phy)
++{
++ struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
++
++ ipq4019_hs_phy_power_off(_phy);
++
++ reset_control_deassert(phy->srif_rst);
++ msleep(10);
++
++ writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
++ writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
++ writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
++ writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
++ writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
++ writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
++ writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
++ msleep(10);
++
++ reset_control_deassert(phy->por_rst);
++
++ return 0;
++}
++
++static struct phy_ops ipq4019_usb_hs_phy_ops = {
++ .power_on = ipq4019_hs_phy_power_on,
++ .power_off = ipq4019_hs_phy_power_off,
++};
++
++static const struct of_device_id ipq4019_usb_phy_of_match[] = {
++ { .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
++ { .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
++ { },
++};
++MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
++
++static int ipq4019_usb_phy_probe(struct platform_device *pdev)
++{
++ struct device *dev = &pdev->dev;
++ struct resource *res;
++ struct phy_provider *phy_provider;
++ struct ipq4019_usb_phy *phy;
++ const struct of_device_id *match;
++
++ match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
++ if (!match)
++ return -ENODEV;
++
++ phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
++ if (!phy)
++ return -ENOMEM;
++
++ phy->dev = &pdev->dev;
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ phy->base = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(phy->base)) {
++ dev_err(dev, "failed to remap register memory\n");
++ return PTR_ERR(phy->base);
++ }
++
++ phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
++ if (IS_ERR(phy->por_rst)) {
++ if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
++ dev_err(dev, "POR reset is missing\n");
++ return PTR_ERR(phy->por_rst);
++ }
++
++ phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
++ if (IS_ERR(phy->srif_rst))
++ return PTR_ERR(phy->srif_rst);
++
++ phy->phy = devm_phy_create(dev, NULL, match->data);
++ if (IS_ERR(phy->phy)) {
++ dev_err(dev, "failed to create PHY\n");
++ return PTR_ERR(phy->phy);
++ }
++ phy_set_drvdata(phy->phy, phy);
++
++ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
++
++ return PTR_ERR_OR_ZERO(phy_provider);
++}
++
++static struct platform_driver ipq4019_usb_phy_driver = {
++ .probe = ipq4019_usb_phy_probe,
++ .driver = {
++ .of_match_table = ipq4019_usb_phy_of_match,
++ .name = "ipq4019-usb-phy",
++ }
++};
++module_platform_driver(ipq4019_usb_phy_driver);
++
++MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
++MODULE_AUTHOR("John Crispin <john@phrozen.org>");
++MODULE_LICENSE("GPL v2");
+Index: linux-4.14.54/drivers/phy/qualcomm/Makefile
+===================================================================
+--- linux-4.14.54.orig/drivers/phy/qualcomm/Makefile
++++ linux-4.14.54/drivers/phy/qualcomm/Makefile
+@@ -1,5 +1,6 @@
+ # SPDX-License-Identifier: GPL-2.0
+ obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
++obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
+ obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
+ obj-$(CONFIG_PHY_QCOM_QMP) += phy-qcom-qmp.o
+ obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o