diff options
Diffstat (limited to 'target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch index df96ad5..fc2fe0a 100644 --- a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch @@ -15,14 +15,15 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts -@@ -35,6 +35,22 @@ +@@ -35,6 +35,24 @@ bias-disable; }; + pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; -+ drive-strength = <2>; ++ function = "pcie1_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -30,7 +31,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> + pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; -+ drive-strength = <2>; ++ function = "pcie2_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -38,7 +40,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; -@@ -114,5 +130,19 @@ +@@ -114,5 +132,19 @@ sata@29000000 { status = "ok"; }; @@ -60,14 +62,15 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> }; --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts -@@ -30,6 +30,30 @@ +@@ -30,6 +30,33 @@ bias-disable; }; + pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; -+ drive-strength = <2>; ++ function = "pcie1_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -75,7 +78,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> + pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; -+ drive-strength = <2>; ++ function = "pcie2_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -83,7 +87,8 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> + pcie2_pins: pcie2_pinmux { + mux { + pins = "gpio63"; -+ drive-strength = <2>; ++ function = "pcie3_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -91,7 +96,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; -@@ -128,5 +152,26 @@ +@@ -128,5 +155,26 @@ usb30@1 { status = "ok"; }; |