1 files changed, 0 insertions, 75 deletions
diff --git a/target/linux/ipq806x/patches/0046-mmc-sdhci-msm-Qualcomm-SDHCI-binding-documentation.patch b/target/linux/ipq806x/patches/0046-mmc-sdhci-msm-Qualcomm-SDHCI-binding-documentation.patch
deleted file mode 100644
index 65c5347..0000000
--- a/target/linux/ipq806x/patches/0046-mmc-sdhci-msm-Qualcomm-SDHCI-binding-documentation.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 8a70c89b2fbb635a8d4fec302165343827aeed9f Mon Sep 17 00:00:00 2001
-From: Georgi Djakov <gdjakov@mm-sol.com>
-Date: Mon, 10 Mar 2014 17:37:11 +0200
-Subject: [PATCH 046/182] mmc: sdhci-msm: Qualcomm SDHCI binding documentation
-
-This patch adds the device-tree binding documentation for Qualcomm
-SDHCI driver. It contains the differences between the core properties
-in mmc.txt and the properties used by the sdhci-msm driver.
-
-Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
-Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
-Signed-off-by: Chris Ball <chris@printf.net>
----
- .../devicetree/bindings/mmc/sdhci-msm.txt          |   55 ++++++++++++++++++++
- 1 file changed, 55 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
-@@ -0,0 +1,55 @@
-+* Qualcomm SDHCI controller (sdhci-msm)
-+
-+This file documents differences between the core properties in mmc.txt
-+and the properties used by the sdhci-msm driver.
-+
-+Required properties:
-+- compatible: Should contain "qcom,sdhci-msm-v4".
-+- reg: Base address and length of the register in the following order:
-+	- Host controller register map (required)
-+	- SD Core register map (required)
-+- interrupts: Should contain an interrupt-specifiers for the interrupts:
-+	- Host controller interrupt (required)
-+- pinctrl-names: Should contain only one value - "default".
-+- pinctrl-0: Should specify pin control groups used for this controller.
-+- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
-+- clock-names: Should contain the following:
-+	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
-+	"core"	- SDC MMC clock (MCLK) (required)
-+	"bus"	- SDCC bus voter clock (optional)
-+
-+Example:
-+
-+	sdhc_1: sdhci@f9824900 {
-+		compatible = "qcom,sdhci-msm-v4";
-+		reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
-+		interrupts = <0 123 0>;
-+		bus-width = <8>;
-+		non-removable;
-+
-+		vmmc = <&pm8941_l20>;
-+		vqmmc = <&pm8941_s3>;
-+
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;
-+
-+		clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
-+		clock-names = "core", "iface";
-+	};
-+
-+	sdhc_2: sdhci@f98a4900 {
-+		compatible = "qcom,sdhci-msm-v4";
-+		reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
-+		interrupts = <0 125 0>;
-+		bus-width = <4>;
-+		cd-gpios = <&msmgpio 62 0x1>;
-+
-+		vmmc = <&pm8941_l21>;
-+		vqmmc = <&pm8941_l13>;
-+
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;
-+
-+		clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
-+		clock-names = "core", "iface";
-+	};