summaryrefslogtreecommitdiff
path: root/target/linux/lantiq/dts/falcon.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/lantiq/dts/falcon.dtsi')
-rw-r--r--target/linux/lantiq/dts/falcon.dtsi388
1 files changed, 388 insertions, 0 deletions
diff --git a/target/linux/lantiq/dts/falcon.dtsi b/target/linux/lantiq/dts/falcon.dtsi
new file mode 100644
index 0000000..76dde61
--- /dev/null
+++ b/target/linux/lantiq/dts/falcon.dtsi
@@ -0,0 +1,388 @@
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "lantiq,falcon";
+
+ cpus {
+ cpu@0 {
+ compatible = "mips,mips34kc";
+ };
+ };
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ };
+
+ clocks {
+ compatible = "simple-bus";
+
+ cpu_clk: cpu {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ clock-output-names = "cpu";
+ };
+
+ io_clk: io {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ clock-output-names = "io";
+ };
+
+ fpi_clk: fpi {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "fpi";
+ };
+ };
+
+ ebu_cs0: localbus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "lantiq,localbus", "simple-bus";
+ reg = <0x10000000 0x4000000>;
+ ranges = <0x0 0x10000000 0x4000000>;
+ };
+ ebu_cs1: localbus@14000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "lantiq,localbus", "simple-bus";
+ reg = <0x14000000 0x4000000>;
+ ranges = <0x0 0x14000000 0x4000000>;
+ };
+
+ ebu@18000000 {
+ compatible = "lantiq,ebu-falcon";
+ reg = <0x18000000 0x100>;
+ };
+
+ sbs2@1D000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "lantiq,sysb2", "simple-bus";
+ reg = <0x1D000000 0x1000000>;
+ ranges = <0x0 0x1D000000 0x1000000>;
+
+ clock_sysgpe: clock-controller@700000 {
+ compatible = "lantiq,sysgpe-falcon";
+ reg = <0x700000 0x100>;
+ #clock-cells = <1>;
+ };
+
+ mps@4000 {
+ compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100";
+ reg = <0x4000 0x1000>;
+ interrupt-parent = <&icu0>;
+ interrupts = <154 155>;
+ lantiq,mbx = <&mpsmbx>;
+ };
+
+ gpio0: gpio@810000 {
+ compatible = "lantiq,falcon-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&icu0>;
+ interrupts = <44>;
+ reg = <0x810000 0x80>;
+ clocks = <&clock_syseth 16>;
+ };
+
+ gpio2: gpio@810100 {
+ compatible = "lantiq,falcon-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&icu0>;
+ interrupts = <46>;
+ reg = <0x810100 0x80>;
+ clocks = <&clock_syseth 17>;
+ };
+
+ clock_syseth: clock-controller@B00000 {
+ compatible = "lantiq,syseth-falcon";
+ reg = <0xB00000 0x100>;
+ #clock-cells = <1>;
+ };
+
+ pad@B01000 {
+ compatible = "lantiq,pad-falcon";
+ reg = <0xB01000 0x100>;
+ lantiq,bank = <0>;
+ clocks = <&clock_syseth 20>;
+ };
+
+ pad@B02000 {
+ compatible = "lantiq,pad-falcon";
+ reg = <0xB02000 0x100>;
+ lantiq,bank = <2>;
+ clocks = <&clock_syseth 21>;
+ };
+ };
+
+ fpi@1E000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "lantiq,fpi", "simple-bus";
+ reg = <0x1E000000 0x1000000>;
+ ranges = <0x0 0x1E000000 0x1000000>;
+
+ serial1: serial@100B00 {
+ status = "disabled";
+ compatible = "lantiq,asc";
+ reg = <0x100B00 0x100>;
+ interrupt-parent = <&icu0>;
+ interrupts = <112 113 114>;
+ line = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&asc1_pins>;
+ clocks = <&clock_sys1 11>;
+ };
+
+ serial0: serial@100C00 {
+ compatible = "lantiq,asc";
+ reg = <0x100C00 0x100>;
+ interrupt-parent = <&icu0>;
+ interrupts = <104 105 106>;
+ line = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&asc0_pins>;
+ clocks = <&clock_sys1 12>;
+ };
+
+ spi: spi@100D00 {
+ status = "disabled";
+ compatible = "intel,falcon-spi", "intel,xrx100-spi", "lantiq,spi-lantiq-ssc";
+ interrupts = <22 23 24 25>;
+ interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x100D00 0x100>;
+ interrupt-parent = <&icu0>;
+ clocks = <&clock_sys1 13>;
+ base_cs = <1>;
+ num_cs = <2>;
+ };
+
+ gptc@100E00 {
+ compatible = "lantiq,gptc-falcon";
+ reg = <0x100E00 0x100>;
+ };
+
+ i2c: i2c@200000 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "lantiq,lantiq-i2c";
+ reg = <0x200000 0x10000>;
+ interrupt-parent = <&icu0>;
+ interrupts = <18 19 20 21>;
+ gpios = <&gpio1 7 0 &gpio1 8 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c_pins>;
+ clocks = <&clock_sys1 14>;
+ };
+
+ gpio1: gpio@800100 {
+ compatible = "lantiq,falcon-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&icu0>;
+ interrupts = <45>;
+ reg = <0x800100 0x100>;
+ clocks = <&clock_sys1 16>;
+ };
+
+ gpio3: gpio@800200 {
+ compatible = "lantiq,falcon-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&icu0>;
+ interrupts = <47>;
+ reg = <0x800200 0x100>;
+ clocks = <&clock_sys1 17>;
+ };
+
+ gpio4: gpio@800300 {
+ compatible = "lantiq,falcon-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&icu0>;
+ interrupts = <48>;
+ reg = <0x800300 0x100>;
+ clocks = <&clock_sys1 18>;
+ };
+
+ pad@800400 {
+ compatible = "lantiq,pad-falcon";
+ reg = <0x800400 0x100>;
+ lantiq,bank = <1>;
+ clocks = <&clock_sys1 20>;
+ };
+
+ pad@800500 {
+ compatible = "lantiq,pad-falcon";
+ reg = <0x800500 0x100>;
+ lantiq,bank = <3>;
+ clocks = <&clock_sys1 21>;
+ };
+
+ pad@800600 {
+ compatible = "lantiq,pad-falcon";
+ reg = <0x800600 0x100>;
+ lantiq,bank = <4>;
+ clocks = <&clock_sys1 22>;
+ };
+
+ status@802000 {
+ compatible = "lantiq,status-falcon";
+ reg = <0x802000 0x80>;
+ };
+
+ clock_sys1: clock-controller@F00000 {
+ compatible = "lantiq,sys1-falcon";
+ reg = <0xF00000 0x100>;
+ #clock-cells = <1>;
+ };
+ };
+
+ sbs0@1F000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ reg = <0x1F000000 0x400000>;
+ ranges = <0x0 0x1F000000 0x400000>;
+
+ mpsmbx: mpsmbx@200000 {
+ reg = <0x200000 0x200>;
+ };
+ };
+
+ sbs1@1F700000 {
+
+ };
+
+ biu@1F800000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "lantiq,biu", "simple-bus";
+ reg = <0x1F800000 0x800000>;
+ ranges = <0x0 0x1F800000 0x800000>;
+
+ icu0: icu@80200 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ compatible = "lantiq,icu";
+ reg = <0x80200 0x28
+ 0x80228 0x28
+ 0x80250 0x28
+ 0x80278 0x28
+ 0x802a0 0x28>;
+ };
+
+ watchdog@803F0 {
+ compatible = "lantiq,wdt";
+ reg = <0x803F0 0x10>;
+ clocks = <&io_clk>; /* currently no effect */
+ };
+ };
+
+ pinctrl {
+ compatible = "lantiq,pinctrl-falcon";
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinctrl0 {
+ /*ntr {
+ lantiq,groups = "ntr8k";
+ lantiq,function = "ntr";
+ };*/
+ hrst {
+ lantiq,groups = "hrst";
+ lantiq,function = "rst";
+ };
+ };
+
+ asc0_pins: asc0 {
+ asc0 {
+ lantiq,groups = "asc0";
+ lantiq,function = "asc";
+ };
+ };
+ asc1_pins: asc1 {
+ asc1 {
+ lantiq,groups = "asc1";
+ lantiq,function = "asc";
+ };
+ };
+ i2c_pins: i2c {
+ i2c {
+ lantiq,groups = "i2c";
+ lantiq,function = "i2c";
+ };
+ };
+ bootled_pins: bootled {
+ bootled {
+ lantiq,groups = "bootled";
+ lantiq,function = "led";
+ };
+ };
+ ntr_ntr8k: ntr8k {
+ ntr8k {
+ lantiq,groups = "ntr8k";
+ lantiq,function = "ntr";
+ };
+ };
+ ntr_pps: pps {
+ pps {
+ lantiq,groups = "pps";
+ lantiq,function = "ntr";
+ };
+ };
+ ntr_gpio: gpio {
+ gpio {
+ lantiq,pins = "io5";
+ lantiq,mux = <1>;
+ lantiq,output = <0>;
+ };
+ };
+ slic_pins: slic {
+ slic {
+ lantiq,groups = "slic";
+ lantiq,function = "slic";
+ };
+ };
+ };
+
+ pinselect-ntr {
+ compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr";
+ pinctrl-names = "ntr8k", "pps", "gpio";
+ pinctrl-0 = <&ntr_ntr8k>;
+ pinctrl-1 = <&ntr_pps>;
+ pinctrl-2 = <&ntr_gpio>;
+ };
+
+ pinselect-asc1 {
+ compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1";
+ pinctrl-names = "default", "asc1";
+ pinctrl-0 = <&slic_pins>;
+ pinctrl-1 = <&asc1_pins>;
+ };
+
+};