1 files changed, 29 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.14/0006-reset-mediatek-mt2701-reset-driver.patch b/target/linux/mediatek/patches-4.14/0006-reset-mediatek-mt2701-reset-driver.patch
new file mode 100644
index 0000000..770a1a0
--- /dev/null
+++ b/target/linux/mediatek/patches-4.14/0006-reset-mediatek-mt2701-reset-driver.patch
@@ -0,0 +1,29 @@
+From 596c3a7300c0419dba71d58cbd4136e0d1e12a4e Mon Sep 17 00:00:00 2001
+From: Shunli Wang <shunli.wang@mediatek.com>
+Date: Tue, 5 Jan 2016 14:30:22 +0800
+Subject: [PATCH 06/57] reset: mediatek: mt2701 reset driver
+
+In infrasys and perifsys, there are many reset
+control bits for kinds of modules. These bits are
+used as actual reset controllers to be registered
+into kernel's generic reset controller framework.
+
+Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
+Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
+---
+ drivers/clk/mediatek/clk-mt2701.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+Index: linux-4.14.11/drivers/clk/mediatek/clk-mt2701.c
+===================================================================
+--- linux-4.14.11.orig/drivers/clk/mediatek/clk-mt2701.c
++++ linux-4.14.11/drivers/clk/mediatek/clk-mt2701.c
+@@ -771,6 +771,8 @@ static void mtk_infrasys_init_early(stru
+ 	if (r)
+ 		pr_err("%s(): could not register clock provider: %d\n",
+ 			__func__, r);
++
++	mtk_register_reset_controller(node, 2, 0x30);
+ }
+ CLK_OF_DECLARE_DRIVER(mtk_infra, "mediatek,mt2701-infracfg",
+ 			mtk_infrasys_init_early);