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Diffstat (limited to 'target/linux/mvebu/patches-3.10/0058-ARM-mvebu-Relocate-Armada-370-XP-DeviceBus-device-tr.patch')
-rw-r--r--target/linux/mvebu/patches-3.10/0058-ARM-mvebu-Relocate-Armada-370-XP-DeviceBus-device-tr.patch357
1 files changed, 0 insertions, 357 deletions
diff --git a/target/linux/mvebu/patches-3.10/0058-ARM-mvebu-Relocate-Armada-370-XP-DeviceBus-device-tr.patch b/target/linux/mvebu/patches-3.10/0058-ARM-mvebu-Relocate-Armada-370-XP-DeviceBus-device-tr.patch
deleted file mode 100644
index 4d7bb5f..0000000
--- a/target/linux/mvebu/patches-3.10/0058-ARM-mvebu-Relocate-Armada-370-XP-DeviceBus-device-tr.patch
+++ /dev/null
@@ -1,357 +0,0 @@
-From bcb0e54d62804f1f986ad478a11235dadb1b61bb Mon Sep 17 00:00:00 2001
-From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
-Date: Fri, 14 Jun 2013 10:44:57 -0300
-Subject: [PATCH 058/203] ARM: mvebu: Relocate Armada 370/XP DeviceBus device
- tree nodes
-
-Now that mbus has been added to the device tree, it's possible to
-move the DeviceBus out of internal registers, placing it directly
-below the mbus. This is a more accurate representation of the hardware.
-
-Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
-Tested-by: Andrew Lunn <andrew@lunn.ch>
-Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
----
- arch/arm/boot/dts/armada-370-xp.dtsi | 94 +++++++++++++-----------
- arch/arm/boot/dts/armada-xp-db.dts | 59 +++++++--------
- arch/arm/boot/dts/armada-xp-gp.dts | 60 +++++++--------
- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 60 +++++++--------
- 4 files changed, 140 insertions(+), 133 deletions(-)
-
---- a/arch/arm/boot/dts/armada-370-xp.dtsi
-+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
-@@ -36,6 +36,56 @@
- controller = <&mbusc>;
- interrupt-parent = <&mpic>;
-
-+ devbus-bootcs {
-+ compatible = "marvell,mvebu-devbus";
-+ reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
-+ ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ clocks = <&coreclk 0>;
-+ status = "disabled";
-+ };
-+
-+ devbus-cs0 {
-+ compatible = "marvell,mvebu-devbus";
-+ reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
-+ ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ clocks = <&coreclk 0>;
-+ status = "disabled";
-+ };
-+
-+ devbus-cs1 {
-+ compatible = "marvell,mvebu-devbus";
-+ reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
-+ ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ clocks = <&coreclk 0>;
-+ status = "disabled";
-+ };
-+
-+ devbus-cs2 {
-+ compatible = "marvell,mvebu-devbus";
-+ reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
-+ ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ clocks = <&coreclk 0>;
-+ status = "disabled";
-+ };
-+
-+ devbus-cs3 {
-+ compatible = "marvell,mvebu-devbus";
-+ reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
-+ ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ clocks = <&coreclk 0>;
-+ status = "disabled";
-+ };
-+
- internal-regs {
- compatible = "simple-bus";
- #address-cells = <1>;
-@@ -191,50 +241,6 @@
- status = "disabled";
- };
-
-- devbus-bootcs@10400 {
-- compatible = "marvell,mvebu-devbus";
-- reg = <0x10400 0x8>;
-- #address-cells = <1>;
-- #size-cells = <1>;
-- clocks = <&coreclk 0>;
-- status = "disabled";
-- };
--
-- devbus-cs0@10408 {
-- compatible = "marvell,mvebu-devbus";
-- reg = <0x10408 0x8>;
-- #address-cells = <1>;
-- #size-cells = <1>;
-- clocks = <&coreclk 0>;
-- status = "disabled";
-- };
--
-- devbus-cs1@10410 {
-- compatible = "marvell,mvebu-devbus";
-- reg = <0x10410 0x8>;
-- #address-cells = <1>;
-- #size-cells = <1>;
-- clocks = <&coreclk 0>;
-- status = "disabled";
-- };
--
-- devbus-cs2@10418 {
-- compatible = "marvell,mvebu-devbus";
-- reg = <0x10418 0x8>;
-- #address-cells = <1>;
-- #size-cells = <1>;
-- clocks = <&coreclk 0>;
-- status = "disabled";
-- };
--
-- devbus-cs3@10420 {
-- compatible = "marvell,mvebu-devbus";
-- reg = <0x10420 0x8>;
-- #address-cells = <1>;
-- #size-cells = <1>;
-- clocks = <&coreclk 0>;
-- status = "disabled";
-- };
- };
- };
- };
---- a/arch/arm/boot/dts/armada-xp-db.dts
-+++ b/arch/arm/boot/dts/armada-xp-db.dts
-@@ -31,7 +31,36 @@
-
- soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
-- MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
-+ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
-+ MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
-+
-+ devbus-bootcs {
-+ status = "okay";
-+
-+ /* Device Bus parameters are required */
-+
-+ /* Read parameters */
-+ devbus,bus-width = <8>;
-+ devbus,turn-off-ps = <60000>;
-+ devbus,badr-skew-ps = <0>;
-+ devbus,acc-first-ps = <124000>;
-+ devbus,acc-next-ps = <248000>;
-+ devbus,rd-setup-ps = <0>;
-+ devbus,rd-hold-ps = <0>;
-+
-+ /* Write parameters */
-+ devbus,sync-enable = <0>;
-+ devbus,wr-high-ps = <60000>;
-+ devbus,wr-low-ps = <60000>;
-+ devbus,ale-wr-ps = <60000>;
-+
-+ /* NOR 16 MiB */
-+ nor@0 {
-+ compatible = "cfi-flash";
-+ reg = <0 0x1000000>;
-+ bank-width = <2>;
-+ };
-+ };
-
- internal-regs {
- serial@12000 {
-@@ -160,34 +189,6 @@
- };
- };
-
-- devbus-bootcs@10400 {
-- status = "okay";
-- ranges = <0 0xf0000000 0x1000000>;
--
-- /* Device Bus parameters are required */
--
-- /* Read parameters */
-- devbus,bus-width = <8>;
-- devbus,turn-off-ps = <60000>;
-- devbus,badr-skew-ps = <0>;
-- devbus,acc-first-ps = <124000>;
-- devbus,acc-next-ps = <248000>;
-- devbus,rd-setup-ps = <0>;
-- devbus,rd-hold-ps = <0>;
--
-- /* Write parameters */
-- devbus,sync-enable = <0>;
-- devbus,wr-high-ps = <60000>;
-- devbus,wr-low-ps = <60000>;
-- devbus,ale-wr-ps = <60000>;
--
-- /* NOR 16 MiB */
-- nor@0 {
-- compatible = "cfi-flash";
-- reg = <0 0x1000000>;
-- bank-width = <2>;
-- };
-- };
- };
- };
- };
---- a/arch/arm/boot/dts/armada-xp-gp.dts
-+++ b/arch/arm/boot/dts/armada-xp-gp.dts
-@@ -40,7 +40,36 @@
-
- soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
-- MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
-+ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
-+ MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
-+
-+ devbus-bootcs {
-+ status = "okay";
-+
-+ /* Device Bus parameters are required */
-+
-+ /* Read parameters */
-+ devbus,bus-width = <8>;
-+ devbus,turn-off-ps = <60000>;
-+ devbus,badr-skew-ps = <0>;
-+ devbus,acc-first-ps = <124000>;
-+ devbus,acc-next-ps = <248000>;
-+ devbus,rd-setup-ps = <0>;
-+ devbus,rd-hold-ps = <0>;
-+
-+ /* Write parameters */
-+ devbus,sync-enable = <0>;
-+ devbus,wr-high-ps = <60000>;
-+ devbus,wr-low-ps = <60000>;
-+ devbus,ale-wr-ps = <60000>;
-+
-+ /* NOR 16 MiB */
-+ nor@0 {
-+ compatible = "cfi-flash";
-+ reg = <0 0x1000000>;
-+ bank-width = <2>;
-+ };
-+ };
-
- internal-regs {
- serial@12000 {
-@@ -126,35 +155,6 @@
- };
- };
-
-- devbus-bootcs@10400 {
-- status = "okay";
-- ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */
--
-- /* Device Bus parameters are required */
--
-- /* Read parameters */
-- devbus,bus-width = <8>;
-- devbus,turn-off-ps = <60000>;
-- devbus,badr-skew-ps = <0>;
-- devbus,acc-first-ps = <124000>;
-- devbus,acc-next-ps = <248000>;
-- devbus,rd-setup-ps = <0>;
-- devbus,rd-hold-ps = <0>;
--
-- /* Write parameters */
-- devbus,sync-enable = <0>;
-- devbus,wr-high-ps = <60000>;
-- devbus,wr-low-ps = <60000>;
-- devbus,ale-wr-ps = <60000>;
--
-- /* NOR 16 MiB */
-- nor@0 {
-- compatible = "cfi-flash";
-- reg = <0 0x1000000>;
-- bank-width = <2>;
-- };
-- };
--
- pcie-controller {
- status = "okay";
-
---- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
-+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
-@@ -28,7 +28,36 @@
-
- soc {
- ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
-- MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
-+ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
-+ MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>;
-+
-+ devbus-bootcs {
-+ status = "okay";
-+
-+ /* Device Bus parameters are required */
-+
-+ /* Read parameters */
-+ devbus,bus-width = <8>;
-+ devbus,turn-off-ps = <60000>;
-+ devbus,badr-skew-ps = <0>;
-+ devbus,acc-first-ps = <124000>;
-+ devbus,acc-next-ps = <248000>;
-+ devbus,rd-setup-ps = <0>;
-+ devbus,rd-hold-ps = <0>;
-+
-+ /* Write parameters */
-+ devbus,sync-enable = <0>;
-+ devbus,wr-high-ps = <60000>;
-+ devbus,wr-low-ps = <60000>;
-+ devbus,ale-wr-ps = <60000>;
-+
-+ /* NOR 128 MiB */
-+ nor@0 {
-+ compatible = "cfi-flash";
-+ reg = <0 0x8000000>;
-+ bank-width = <2>;
-+ };
-+ };
-
- internal-regs {
- serial@12000 {
-@@ -144,35 +173,6 @@
- status = "okay";
- };
-
-- devbus-bootcs@10400 {
-- status = "okay";
-- ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
--
-- /* Device Bus parameters are required */
--
-- /* Read parameters */
-- devbus,bus-width = <8>;
-- devbus,turn-off-ps = <60000>;
-- devbus,badr-skew-ps = <0>;
-- devbus,acc-first-ps = <124000>;
-- devbus,acc-next-ps = <248000>;
-- devbus,rd-setup-ps = <0>;
-- devbus,rd-hold-ps = <0>;
--
-- /* Write parameters */
-- devbus,sync-enable = <0>;
-- devbus,wr-high-ps = <60000>;
-- devbus,wr-low-ps = <60000>;
-- devbus,ale-wr-ps = <60000>;
--
-- /* NOR 128 MiB */
-- nor@0 {
-- compatible = "cfi-flash";
-- reg = <0 0x8000000>;
-- bank-width = <2>;
-- };
-- };
--
- pcie-controller {
- status = "okay";
- /* Internal mini-PCIe connector */
generated by cgit v1.1 at 2024-12-16 03:17:15 +0000