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-rw-r--r--target/linux/mvebu/patches-3.10/0183-of-irq-Rename-of_irq_map_-functions-to-of_irq_parse_.patch682
1 files changed, 682 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.10/0183-of-irq-Rename-of_irq_map_-functions-to-of_irq_parse_.patch b/target/linux/mvebu/patches-3.10/0183-of-irq-Rename-of_irq_map_-functions-to-of_irq_parse_.patch
new file mode 100644
index 0000000..5007d91
--- /dev/null
+++ b/target/linux/mvebu/patches-3.10/0183-of-irq-Rename-of_irq_map_-functions-to-of_irq_parse_.patch
@@ -0,0 +1,682 @@
+From fd33285b3dab183df0cea06de9f618886dc0f1c0 Mon Sep 17 00:00:00 2001
+From: Grant Likely <grant.likely@linaro.org>
+Date: Thu, 19 Dec 2013 09:30:54 -0300
+Subject: [PATCH 183/203] of/irq: Rename of_irq_map_* functions to
+ of_irq_parse_*
+
+The OF irq handling code has been overloading the term 'map' to refer to
+both parsing the data in the device tree and mapping it to the internal
+linux irq system. This is probably because the device tree does have the
+concept of an 'interrupt-map' function for translating interrupt
+references from one node to another, but 'map' is still confusing when
+the primary purpose of some of the functions are to parse the DT data.
+
+This patch renames all the of_irq_map_* functions to of_irq_parse_*
+which makes it clear that there is a difference between the parsing
+phase and the mapping phase. Kernel code can make use of just the
+parsing or just the mapping support as needed by the subsystem.
+
+The patch was generated mechanically with a handful of sed commands.
+
+Signed-off-by: Grant Likely <grant.likely@linaro.org>
+Acked-by: Michal Simek <monstr@monstr.eu>
+Acked-by: Tony Lindgren <tony@atomide.com>
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+
+Conflicts:
+ arch/arm/mach-integrator/pci_v3.c
+ arch/mips/pci/pci-rt3883.c
+---
+ arch/arm/mach-integrator/pci_v3.c | 279 +++++++++++++++++++++++++
+ arch/microblaze/pci/pci-common.c | 2 +-
+ arch/mips/pci/fixup-lantiq.c | 2 +-
+ arch/powerpc/kernel/pci-common.c | 2 +-
+ arch/powerpc/platforms/cell/celleb_scc_pciex.c | 2 +-
+ arch/powerpc/platforms/cell/celleb_scc_sio.c | 2 +-
+ arch/powerpc/platforms/cell/spider-pic.c | 2 +-
+ arch/powerpc/platforms/cell/spu_manage.c | 2 +-
+ arch/powerpc/platforms/fsl_uli1575.c | 2 +-
+ arch/powerpc/platforms/powermac/pic.c | 2 +-
+ arch/powerpc/platforms/pseries/event_sources.c | 2 +-
+ arch/powerpc/sysdev/mpic_msi.c | 2 +-
+ arch/x86/kernel/devicetree.c | 2 +-
+ drivers/of/address.c | 4 +-
+ drivers/of/irq.c | 28 +--
+ drivers/of/of_pci_irq.c | 10 +-
+ drivers/pci/host/pci-mvebu.c | 2 +-
+ include/linux/of_irq.h | 8 +-
+ include/linux/of_pci.h | 2 +-
+ 19 files changed, 318 insertions(+), 39 deletions(-)
+
+--- a/arch/arm/mach-integrator/pci_v3.c
++++ b/arch/arm/mach-integrator/pci_v3.c
+@@ -610,3 +610,282 @@ void __init pci_v3_postinit(void)
+
+ register_isa_ports(PHYS_PCI_MEM_BASE, PHYS_PCI_IO_BASE, 0);
+ }
++
++/*
++ * A small note about bridges and interrupts. The DECchip 21050 (and
++ * later) adheres to the PCI-PCI bridge specification. This says that
++ * the interrupts on the other side of a bridge are swizzled in the
++ * following manner:
++ *
++ * Dev Interrupt Interrupt
++ * Pin on Pin on
++ * Device Connector
++ *
++ * 4 A A
++ * B B
++ * C C
++ * D D
++ *
++ * 5 A B
++ * B C
++ * C D
++ * D A
++ *
++ * 6 A C
++ * B D
++ * C A
++ * D B
++ *
++ * 7 A D
++ * B A
++ * C B
++ * D C
++ *
++ * Where A = pin 1, B = pin 2 and so on and pin=0 = default = A.
++ * Thus, each swizzle is ((pin-1) + (device#-4)) % 4
++ */
++
++/*
++ * This routine handles multiple bridges.
++ */
++static u8 __init pci_v3_swizzle(struct pci_dev *dev, u8 *pinp)
++{
++ if (*pinp == 0)
++ *pinp = 1;
++
++ return pci_common_swizzle(dev, pinp);
++}
++
++static int irq_tab[4] __initdata = {
++ IRQ_AP_PCIINT0, IRQ_AP_PCIINT1, IRQ_AP_PCIINT2, IRQ_AP_PCIINT3
++};
++
++/*
++ * map the specified device/slot/pin to an IRQ. This works out such
++ * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1.
++ */
++static int __init pci_v3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
++{
++ int intnr = ((slot - 9) + (pin - 1)) & 3;
++
++ return irq_tab[intnr];
++}
++
++static struct hw_pci pci_v3 __initdata = {
++ .swizzle = pci_v3_swizzle,
++ .setup = pci_v3_setup,
++ .nr_controllers = 1,
++ .ops = &pci_v3_ops,
++ .preinit = pci_v3_preinit,
++ .postinit = pci_v3_postinit,
++};
++
++#ifdef CONFIG_OF
++
++static int __init pci_v3_map_irq_dt(const struct pci_dev *dev, u8 slot, u8 pin)
++{
++ struct of_irq oirq;
++ int ret;
++
++ ret = of_irq_parse_pci(dev, &oirq);
++ if (ret) {
++ dev_err(&dev->dev, "of_irq_parse_pci() %d\n", ret);
++ /* Proper return code 0 == NO_IRQ */
++ return 0;
++ }
++
++ return irq_create_of_mapping(oirq.controller, oirq.specifier,
++ oirq.size);
++}
++
++static int __init pci_v3_dtprobe(struct platform_device *pdev,
++ struct device_node *np)
++{
++ struct of_pci_range_parser parser;
++ struct of_pci_range range;
++ struct resource *res;
++ int irq, ret;
++
++ if (of_pci_range_parser_init(&parser, np))
++ return -EINVAL;
++
++ /* Get base for bridge registers */
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ if (!res) {
++ dev_err(&pdev->dev, "unable to obtain PCIv3 base\n");
++ return -ENODEV;
++ }
++ pci_v3_base = devm_ioremap(&pdev->dev, res->start,
++ resource_size(res));
++ if (!pci_v3_base) {
++ dev_err(&pdev->dev, "unable to remap PCIv3 base\n");
++ return -ENODEV;
++ }
++
++ /* Get and request error IRQ resource */
++ irq = platform_get_irq(pdev, 0);
++ if (irq <= 0) {
++ dev_err(&pdev->dev, "unable to obtain PCIv3 error IRQ\n");
++ return -ENODEV;
++ }
++ ret = devm_request_irq(&pdev->dev, irq, v3_irq, 0,
++ "PCIv3 error", NULL);
++ if (ret < 0) {
++ dev_err(&pdev->dev, "unable to request PCIv3 error IRQ %d (%d)\n", irq, ret);
++ return ret;
++ }
++
++ for_each_of_pci_range(&parser, &range) {
++ if (!range.flags) {
++ of_pci_range_to_resource(&range, np, &conf_mem);
++ conf_mem.name = "PCIv3 config";
++ }
++ if (range.flags & IORESOURCE_IO) {
++ of_pci_range_to_resource(&range, np, &io_mem);
++ io_mem.name = "PCIv3 I/O";
++ }
++ if ((range.flags & IORESOURCE_MEM) &&
++ !(range.flags & IORESOURCE_PREFETCH)) {
++ non_mem_pci = range.pci_addr;
++ non_mem_pci_sz = range.size;
++ of_pci_range_to_resource(&range, np, &non_mem);
++ non_mem.name = "PCIv3 non-prefetched mem";
++ }
++ if ((range.flags & IORESOURCE_MEM) &&
++ (range.flags & IORESOURCE_PREFETCH)) {
++ pre_mem_pci = range.pci_addr;
++ pre_mem_pci_sz = range.size;
++ of_pci_range_to_resource(&range, np, &pre_mem);
++ pre_mem.name = "PCIv3 prefetched mem";
++ }
++ }
++
++ if (!conf_mem.start || !io_mem.start ||
++ !non_mem.start || !pre_mem.start) {
++ dev_err(&pdev->dev, "missing ranges in device node\n");
++ return -EINVAL;
++ }
++
++ pci_v3.map_irq = pci_v3_map_irq_dt;
++ pci_common_init_dev(&pdev->dev, &pci_v3);
++
++ return 0;
++}
++
++#else
++
++static inline int pci_v3_dtprobe(struct platform_device *pdev,
++ struct device_node *np)
++{
++ return -EINVAL;
++}
++
++#endif
++
++static int __init pci_v3_probe(struct platform_device *pdev)
++{
++ struct device_node *np = pdev->dev.of_node;
++ int ret;
++
++ /* Remap the Integrator system controller */
++ ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
++ if (!ap_syscon_base) {
++ dev_err(&pdev->dev, "unable to remap the AP syscon for PCIv3\n");
++ return -ENODEV;
++ }
++
++ /* Device tree probe path */
++ if (np)
++ return pci_v3_dtprobe(pdev, np);
++
++ pci_v3_base = devm_ioremap(&pdev->dev, PHYS_PCI_V3_BASE, SZ_64K);
++ if (!pci_v3_base) {
++ dev_err(&pdev->dev, "unable to remap PCIv3 base\n");
++ return -ENODEV;
++ }
++
++ ret = devm_request_irq(&pdev->dev, IRQ_AP_V3INT, v3_irq, 0, "V3", NULL);
++ if (ret) {
++ dev_err(&pdev->dev, "unable to grab PCI error interrupt: %d\n",
++ ret);
++ return -ENODEV;
++ }
++
++ conf_mem.name = "PCIv3 config";
++ conf_mem.start = PHYS_PCI_CONFIG_BASE;
++ conf_mem.end = PHYS_PCI_CONFIG_BASE + SZ_16M - 1;
++ conf_mem.flags = IORESOURCE_MEM;
++
++ io_mem.name = "PCIv3 I/O";
++ io_mem.start = PHYS_PCI_IO_BASE;
++ io_mem.end = PHYS_PCI_IO_BASE + SZ_16M - 1;
++ io_mem.flags = IORESOURCE_MEM;
++
++ non_mem_pci = 0x00000000;
++ non_mem_pci_sz = SZ_256M;
++ non_mem.name = "PCIv3 non-prefetched mem";
++ non_mem.start = PHYS_PCI_MEM_BASE;
++ non_mem.end = PHYS_PCI_MEM_BASE + SZ_256M - 1;
++ non_mem.flags = IORESOURCE_MEM;
++
++ pre_mem_pci = 0x10000000;
++ pre_mem_pci_sz = SZ_256M;
++ pre_mem.name = "PCIv3 prefetched mem";
++ pre_mem.start = PHYS_PCI_PRE_BASE + SZ_256M;
++ pre_mem.end = PHYS_PCI_PRE_BASE + SZ_256M - 1;
++ pre_mem.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
++
++ pci_v3.map_irq = pci_v3_map_irq;
++
++ pci_common_init_dev(&pdev->dev, &pci_v3);
++
++ return 0;
++}
++
++static const struct of_device_id pci_ids[] = {
++ { .compatible = "v3,v360epc-pci", },
++ {},
++};
++
++static struct platform_driver pci_v3_driver = {
++ .driver = {
++ .name = "pci-v3",
++ .of_match_table = pci_ids,
++ },
++};
++
++static int __init pci_v3_init(void)
++{
++ return platform_driver_probe(&pci_v3_driver, pci_v3_probe);
++}
++
++subsys_initcall(pci_v3_init);
++
++/*
++ * Static mappings for the PCIv3 bridge
++ *
++ * e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M)
++ * ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M)
++ * fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
++ */
++static struct map_desc pci_v3_io_desc[] __initdata __maybe_unused = {
++ {
++ .virtual = (unsigned long)PCI_MEMORY_VADDR,
++ .pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
++ .length = SZ_16M,
++ .type = MT_DEVICE
++ }, {
++ .virtual = (unsigned long)PCI_CONFIG_VADDR,
++ .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
++ .length = SZ_16M,
++ .type = MT_DEVICE
++ }
++};
++
++int __init pci_v3_early_init(void)
++{
++ iotable_init(pci_v3_io_desc, ARRAY_SIZE(pci_v3_io_desc));
++ vga_base = (unsigned long)PCI_MEMORY_VADDR;
++ pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
++ return 0;
++}
+--- a/arch/microblaze/pci/pci-common.c
++++ b/arch/microblaze/pci/pci-common.c
+@@ -217,7 +217,7 @@ int pci_read_irq_line(struct pci_dev *pc
+ memset(&oirq, 0xff, sizeof(oirq));
+ #endif
+ /* Try to get a mapping from the device-tree */
+- if (of_irq_map_pci(pci_dev, &oirq)) {
++ if (of_irq_parse_pci(pci_dev, &oirq)) {
+ u8 line, pin;
+
+ /* If that fails, lets fallback to what is in the config
+--- a/arch/mips/pci/fixup-lantiq.c
++++ b/arch/mips/pci/fixup-lantiq.c
+@@ -28,7 +28,7 @@ int __init pcibios_map_irq(const struct
+ struct of_irq dev_irq;
+ int irq;
+
+- if (of_irq_map_pci(dev, &dev_irq)) {
++ if (of_irq_parse_pci(dev, &dev_irq)) {
+ dev_err(&dev->dev, "trying to map irq for unknown slot:%d pin:%d\n",
+ slot, pin);
+ return 0;
+--- a/arch/powerpc/kernel/pci-common.c
++++ b/arch/powerpc/kernel/pci-common.c
+@@ -237,7 +237,7 @@ static int pci_read_irq_line(struct pci_
+ memset(&oirq, 0xff, sizeof(oirq));
+ #endif
+ /* Try to get a mapping from the device-tree */
+- if (of_irq_map_pci(pci_dev, &oirq)) {
++ if (of_irq_parse_pci(pci_dev, &oirq)) {
+ u8 line, pin;
+
+ /* If that fails, lets fallback to what is in the config
+--- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
++++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
+@@ -507,7 +507,7 @@ static __init int celleb_setup_pciex(str
+ phb->ops = &scc_pciex_pci_ops;
+
+ /* internal interrupt handler */
+- if (of_irq_map_one(node, 1, &oirq)) {
++ if (of_irq_parse_one(node, 1, &oirq)) {
+ pr_err("PCIEXC:Failed to map irq\n");
+ goto error;
+ }
+--- a/arch/powerpc/platforms/cell/celleb_scc_sio.c
++++ b/arch/powerpc/platforms/cell/celleb_scc_sio.c
+@@ -53,7 +53,7 @@ static int __init txx9_serial_init(void)
+ if (!(txx9_serial_bitmap & (1<<i)))
+ continue;
+
+- if (of_irq_map_one(node, i, &irq))
++ if (of_irq_parse_one(node, i, &irq))
+ continue;
+ if (of_address_to_resource(node,
+ txx9_scc_tab[i].index, &res))
+--- a/arch/powerpc/platforms/cell/spider-pic.c
++++ b/arch/powerpc/platforms/cell/spider-pic.c
+@@ -236,7 +236,7 @@ static unsigned int __init spider_find_c
+ * tree in case the device-tree is ever fixed
+ */
+ struct of_irq oirq;
+- if (of_irq_map_one(pic->host->of_node, 0, &oirq) == 0) {
++ if (of_irq_parse_one(pic->host->of_node, 0, &oirq) == 0) {
+ virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
+ oirq.size);
+ return virq;
+--- a/arch/powerpc/platforms/cell/spu_manage.c
++++ b/arch/powerpc/platforms/cell/spu_manage.c
+@@ -182,7 +182,7 @@ static int __init spu_map_interrupts(str
+ int i;
+
+ for (i=0; i < 3; i++) {
+- ret = of_irq_map_one(np, i, &oirq);
++ ret = of_irq_parse_one(np, i, &oirq);
+ if (ret) {
+ pr_debug("spu_new: failed to get irq %d\n", i);
+ goto err;
+--- a/arch/powerpc/platforms/fsl_uli1575.c
++++ b/arch/powerpc/platforms/fsl_uli1575.c
+@@ -333,7 +333,7 @@ static void hpcd_final_uli5288(struct pc
+
+ laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8);
+ laddr[1] = laddr[2] = 0;
+- of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
++ of_irq_parse_raw(hosenode, &pin, 1, laddr, &oirq);
+ virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
+ oirq.size);
+ dev->irq = virq;
+--- a/arch/powerpc/platforms/powermac/pic.c
++++ b/arch/powerpc/platforms/powermac/pic.c
+@@ -393,7 +393,7 @@ static void __init pmac_pic_probe_oldsty
+ #endif
+ }
+
+-int of_irq_map_oldworld(struct device_node *device, int index,
++int of_irq_parse_oldworld(struct device_node *device, int index,
+ struct of_irq *out_irq)
+ {
+ const u32 *ints = NULL;
+--- a/arch/powerpc/platforms/pseries/event_sources.c
++++ b/arch/powerpc/platforms/pseries/event_sources.c
+@@ -55,7 +55,7 @@ void request_event_sources_irqs(struct d
+ /* Else use normal interrupt tree parsing */
+ else {
+ /* First try to do a proper OF tree parsing */
+- for (index = 0; of_irq_map_one(np, index, &oirq) == 0;
++ for (index = 0; of_irq_parse_one(np, index, &oirq) == 0;
+ index++) {
+ if (count > 15)
+ break;
+--- a/arch/powerpc/sysdev/mpic_msi.c
++++ b/arch/powerpc/sysdev/mpic_msi.c
+@@ -63,7 +63,7 @@ static int mpic_msi_reserve_u3_hwirqs(st
+ pr_debug("mpic: mapping hwirqs for %s\n", np->full_name);
+
+ index = 0;
+- while (of_irq_map_one(np, index++, &oirq) == 0) {
++ while (of_irq_parse_one(np, index++, &oirq) == 0) {
+ ops->xlate(mpic->irqhost, NULL, oirq.specifier,
+ oirq.size, &hwirq, &flags);
+ msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
+--- a/arch/x86/kernel/devicetree.c
++++ b/arch/x86/kernel/devicetree.c
+@@ -117,7 +117,7 @@ static int x86_of_pci_irq_enable(struct
+ if (!pin)
+ return 0;
+
+- ret = of_irq_map_pci(dev, &oirq);
++ ret = of_irq_parse_pci(dev, &oirq);
+ if (ret)
+ return ret;
+
+--- a/drivers/of/address.c
++++ b/drivers/of/address.c
+@@ -524,12 +524,12 @@ static u64 __of_translate_address(struct
+ pbus->count_cells(dev, &pna, &pns);
+ if (!OF_CHECK_COUNTS(pna, pns)) {
+ printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
+- dev->full_name);
++ of_node_full_name(dev));
+ break;
+ }
+
+ pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
+- pbus->name, pna, pns, parent->full_name);
++ pbus->name, pna, pns, of_node_full_name(parent));
+
+ /* Apply bus translation */
+ if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
+--- a/drivers/of/irq.c
++++ b/drivers/of/irq.c
+@@ -31,14 +31,14 @@
+ * @dev: Device node of the device whose interrupt is to be mapped
+ * @index: Index of the interrupt to map
+ *
+- * This function is a wrapper that chains of_irq_map_one() and
++ * This function is a wrapper that chains of_irq_parse_one() and
+ * irq_create_of_mapping() to make things easier to callers
+ */
+ unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
+ {
+ struct of_irq oirq;
+
+- if (of_irq_map_one(dev, index, &oirq))
++ if (of_irq_parse_one(dev, index, &oirq))
+ return 0;
+
+ return irq_create_of_mapping(oirq.controller, oirq.specifier,
+@@ -79,7 +79,7 @@ struct device_node *of_irq_find_parent(s
+ }
+
+ /**
+- * of_irq_map_raw - Low level interrupt tree parsing
++ * of_irq_parse_raw - Low level interrupt tree parsing
+ * @parent: the device interrupt parent
+ * @intspec: interrupt specifier ("interrupts" property of the device)
+ * @ointsize: size of the passed in interrupt specifier
+@@ -93,7 +93,7 @@ struct device_node *of_irq_find_parent(s
+ * properties, for example when resolving PCI interrupts when no device
+ * node exist for the parent.
+ */
+-int of_irq_map_raw(struct device_node *parent, const __be32 *intspec,
++int of_irq_parse_raw(struct device_node *parent, const __be32 *intspec,
+ u32 ointsize, const __be32 *addr, struct of_irq *out_irq)
+ {
+ struct device_node *ipar, *tnode, *old = NULL, *newpar = NULL;
+@@ -101,7 +101,7 @@ int of_irq_map_raw(struct device_node *p
+ u32 intsize = 1, addrsize, newintsize = 0, newaddrsize = 0;
+ int imaplen, match, i;
+
+- pr_debug("of_irq_map_raw: par=%s,intspec=[0x%08x 0x%08x...],ointsize=%d\n",
++ pr_debug("of_irq_parse_raw: par=%s,intspec=[0x%08x 0x%08x...],ointsize=%d\n",
+ of_node_full_name(parent), be32_to_cpup(intspec),
+ be32_to_cpup(intspec + 1), ointsize);
+
+@@ -126,7 +126,7 @@ int of_irq_map_raw(struct device_node *p
+ goto fail;
+ }
+
+- pr_debug("of_irq_map_raw: ipar=%s, size=%d\n", of_node_full_name(ipar), intsize);
++ pr_debug("of_irq_parse_raw: ipar=%s, size=%d\n", of_node_full_name(ipar), intsize);
+
+ if (ointsize != intsize)
+ return -EINVAL;
+@@ -269,29 +269,29 @@ int of_irq_map_raw(struct device_node *p
+
+ return -EINVAL;
+ }
+-EXPORT_SYMBOL_GPL(of_irq_map_raw);
++EXPORT_SYMBOL_GPL(of_irq_parse_raw);
+
+ /**
+- * of_irq_map_one - Resolve an interrupt for a device
++ * of_irq_parse_one - Resolve an interrupt for a device
+ * @device: the device whose interrupt is to be resolved
+ * @index: index of the interrupt to resolve
+ * @out_irq: structure of_irq filled by this function
+ *
+ * This function resolves an interrupt, walking the tree, for a given
+- * device-tree node. It's the high level pendant to of_irq_map_raw().
++ * device-tree node. It's the high level pendant to of_irq_parse_raw().
+ */
+-int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq)
++int of_irq_parse_one(struct device_node *device, int index, struct of_irq *out_irq)
+ {
+ struct device_node *p;
+ const __be32 *intspec, *tmp, *addr;
+ u32 intsize, intlen;
+ int res = -EINVAL;
+
+- pr_debug("of_irq_map_one: dev=%s, index=%d\n", of_node_full_name(device), index);
++ pr_debug("of_irq_parse_one: dev=%s, index=%d\n", of_node_full_name(device), index);
+
+ /* OldWorld mac stuff is "special", handle out of line */
+ if (of_irq_workarounds & OF_IMAP_OLDWORLD_MAC)
+- return of_irq_map_oldworld(device, index, out_irq);
++ return of_irq_parse_oldworld(device, index, out_irq);
+
+ /* Get the reg property (if any) */
+ addr = of_get_property(device, "reg", NULL);
+@@ -328,13 +328,13 @@ int of_irq_map_one(struct device_node *d
+ goto out;
+
+ /* Get new specifier and map it */
+- res = of_irq_map_raw(p, intspec + index * intsize, intsize,
++ res = of_irq_parse_raw(p, intspec + index * intsize, intsize,
+ addr, out_irq);
+ out:
+ of_node_put(p);
+ return res;
+ }
+-EXPORT_SYMBOL_GPL(of_irq_map_one);
++EXPORT_SYMBOL_GPL(of_irq_parse_one);
+
+ /**
+ * of_irq_to_resource - Decode a node's IRQ and return it as a resource
+--- a/drivers/of/of_pci_irq.c
++++ b/drivers/of/of_pci_irq.c
+@@ -5,7 +5,7 @@
+ #include <asm/prom.h>
+
+ /**
+- * of_irq_map_pci - Resolve the interrupt for a PCI device
++ * of_irq_parse_pci - Resolve the interrupt for a PCI device
+ * @pdev: the device whose interrupt is to be resolved
+ * @out_irq: structure of_irq filled by this function
+ *
+@@ -15,7 +15,7 @@
+ * PCI tree until an device-node is found, at which point it will finish
+ * resolving using the OF tree walking.
+ */
+-int of_irq_map_pci(const struct pci_dev *pdev, struct of_irq *out_irq)
++int of_irq_parse_pci(const struct pci_dev *pdev, struct of_irq *out_irq)
+ {
+ struct device_node *dn, *ppnode;
+ struct pci_dev *ppdev;
+@@ -30,7 +30,7 @@ int of_irq_map_pci(const struct pci_dev
+ */
+ dn = pci_device_to_OF_node(pdev);
+ if (dn) {
+- rc = of_irq_map_one(dn, 0, out_irq);
++ rc = of_irq_parse_one(dn, 0, out_irq);
+ if (!rc)
+ return rc;
+ }
+@@ -88,6 +88,6 @@ int of_irq_map_pci(const struct pci_dev
+ lspec_be = cpu_to_be32(lspec);
+ laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
+ laddr[1] = laddr[2] = cpu_to_be32(0);
+- return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq);
++ return of_irq_parse_raw(ppnode, &lspec_be, 1, laddr, out_irq);
+ }
+-EXPORT_SYMBOL_GPL(of_irq_map_pci);
++EXPORT_SYMBOL_GPL(of_irq_parse_pci);
+--- a/drivers/pci/host/pci-mvebu.c
++++ b/drivers/pci/host/pci-mvebu.c
+@@ -652,7 +652,7 @@ static int __init mvebu_pcie_map_irq(con
+ struct of_irq oirq;
+ int ret;
+
+- ret = of_irq_map_pci(dev, &oirq);
++ ret = of_irq_parse_pci(dev, &oirq);
+ if (ret)
+ return ret;
+
+--- a/include/linux/of_irq.h
++++ b/include/linux/of_irq.h
+@@ -35,12 +35,12 @@ typedef int (*of_irq_init_cb_t)(struct d
+ #if defined(CONFIG_PPC32) && defined(CONFIG_PPC_PMAC)
+ extern unsigned int of_irq_workarounds;
+ extern struct device_node *of_irq_dflt_pic;
+-extern int of_irq_map_oldworld(struct device_node *device, int index,
++extern int of_irq_parse_oldworld(struct device_node *device, int index,
+ struct of_irq *out_irq);
+ #else /* CONFIG_PPC32 && CONFIG_PPC_PMAC */
+ #define of_irq_workarounds (0)
+ #define of_irq_dflt_pic (NULL)
+-static inline int of_irq_map_oldworld(struct device_node *device, int index,
++static inline int of_irq_parse_oldworld(struct device_node *device, int index,
+ struct of_irq *out_irq)
+ {
+ return -EINVAL;
+@@ -48,10 +48,10 @@ static inline int of_irq_map_oldworld(st
+ #endif /* CONFIG_PPC32 && CONFIG_PPC_PMAC */
+
+
+-extern int of_irq_map_raw(struct device_node *parent, const __be32 *intspec,
++extern int of_irq_parse_raw(struct device_node *parent, const __be32 *intspec,
+ u32 ointsize, const __be32 *addr,
+ struct of_irq *out_irq);
+-extern int of_irq_map_one(struct device_node *device, int index,
++extern int of_irq_parse_one(struct device_node *device, int index,
+ struct of_irq *out_irq);
+ extern unsigned int irq_create_of_mapping(struct device_node *controller,
+ const u32 *intspec,
+--- a/include/linux/of_pci.h
++++ b/include/linux/of_pci.h
+@@ -6,7 +6,7 @@
+
+ struct pci_dev;
+ struct of_irq;
+-int of_irq_map_pci(const struct pci_dev *pdev, struct of_irq *out_irq);
++int of_irq_parse_pci(const struct pci_dev *pdev, struct of_irq *out_irq);
+
+ struct device_node;
+ struct device_node *of_pci_find_child_device(struct device_node *parent,
generated by cgit v1.1 at 2024-07-08 23:06:18 +0000