diff options
Diffstat (limited to 'target/linux/mvebu/patches-3.10/0196-ata-sata_mv-setting-PHY-speed-according-to-SControl-.patch')
| -rw-r--r-- | target/linux/mvebu/patches-3.10/0196-ata-sata_mv-setting-PHY-speed-according-to-SControl-.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.10/0196-ata-sata_mv-setting-PHY-speed-according-to-SControl-.patch b/target/linux/mvebu/patches-3.10/0196-ata-sata_mv-setting-PHY-speed-according-to-SControl-.patch new file mode 100644 index 0000000..8a3162c --- /dev/null +++ b/target/linux/mvebu/patches-3.10/0196-ata-sata_mv-setting-PHY-speed-according-to-SControl-.patch @@ -0,0 +1,58 @@ +From d587c866f34aa8e59ddc3628969113e725e36eab Mon Sep 17 00:00:00 2001 +From: Lior Amsalem <alior@marvell.com> +Date: Mon, 23 Dec 2013 13:07:35 +0100 +Subject: [PATCH 196/203] ata: sata_mv: setting PHY speed according to SControl + speed + +This patch fixes a SATA hotplug issue on the Armada 370 and Armada XP +SoCs. Without it, if a disk is unplugged from a SATA port, then further +hotplug notification are now longer received on this port. + +This should be applied to every -stable kernel supporting Armada SoCs. + +Signed-off-by: Lior Amsalem <alior@marvell.com> +Signed-off-by: Nadav Haklai <nadavh@marvell.com> +Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> +Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> +Cc: Jason Cooper <jason@lakedaemon.net> +Cc: Andrew Lunn <andrew@lunn.ch> +Cc: Gregory Clement <gregory.clement@free-electrons.com> +Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> +Cc: stable@vger.kernel.org +--- + drivers/ata/sata_mv.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/ata/sata_mv.c ++++ b/drivers/ata/sata_mv.c +@@ -304,6 +304,7 @@ enum { + MV5_LTMODE = 0x30, + MV5_PHY_CTL = 0x0C, + SATA_IFCFG = 0x050, ++ LP_PHY_CTL = 0x058, + + MV_M2_PREAMP_MASK = 0x7e0, + +@@ -1353,6 +1354,7 @@ static int mv_scr_write(struct ata_link + + if (ofs != 0xffffffffU) { + void __iomem *addr = mv_ap_base(link->ap) + ofs; ++ void __iomem *lp_phy_addr = mv_ap_base(link->ap) + LP_PHY_CTL; + if (sc_reg_in == SCR_CONTROL) { + /* + * Workaround for 88SX60x1 FEr SATA#26: +@@ -1369,6 +1371,14 @@ static int mv_scr_write(struct ata_link + */ + if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1) + val |= 0xf000; ++ ++ /* ++ * Setting PHY speed according to SControl speed ++ */ ++ if ((val & 0xf0) == 0x10) ++ writelfl(0x7, lp_phy_addr); ++ else ++ writelfl(0x227, lp_phy_addr); + } + writelfl(val, addr); + return 0; |