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-rw-r--r--target/linux/ppc40x/patches/100-magicbox-ide-driver.patch359
1 files changed, 0 insertions, 359 deletions
diff --git a/target/linux/ppc40x/patches/100-magicbox-ide-driver.patch b/target/linux/ppc40x/patches/100-magicbox-ide-driver.patch
deleted file mode 100644
index eca26a9..0000000
--- a/target/linux/ppc40x/patches/100-magicbox-ide-driver.patch
+++ /dev/null
@@ -1,359 +0,0 @@
---- a/drivers/ide/Kconfig
-+++ b/drivers/ide/Kconfig
-@@ -712,6 +712,11 @@ config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
- default "128"
- depends on BLK_DEV_IDE_AU1XXX
-
-+config BLK_DEV_IDE_MAGICBOX
-+ tristate "Magicbox CF card support"
-+ depends on MAGICBOXV2 || OPENRB_LIGHT
-+ select IDE_XFER_MODE
-+
- config BLK_DEV_IDE_TX4938
- tristate "TX4938 internal IDE support"
- depends on SOC_TX4938
---- a/drivers/ide/Makefile
-+++ b/drivers/ide/Makefile
-@@ -110,6 +110,7 @@ obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapi
- obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o
-
- obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
-+obj-$(CONFIG_BLK_DEV_IDE_MAGICBOX) += magicbox_ide.o
-
- obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o
- obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o
---- /dev/null
-+++ b/drivers/ide/magicbox_ide.c
-@@ -0,0 +1,332 @@
-+/*
-+ * IDE driver for the MagicBox 2.0 onboard CompactFlash slot.
-+ *
-+ * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * Based on the original driver by Wojtek Kaniewski <wojtekka@toxygen.net>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/ioport.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
-+#include <linux/of_platform.h>
-+#include <linux/ide.h>
-+
-+#define DRV_DESC "IDE driver for Magicbox 2.0 onboard CF slot"
-+#define DRV_NAME "magicbox_cf"
-+
-+static u8 magicbox_ide_inb(unsigned long port)
-+{
-+ return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
-+}
-+
-+static void magicbox_ide_outb(u8 value, unsigned long port)
-+{
-+ writew(value << 8, (void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
-+{
-+ u16 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ *ptr = readw((void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
-+{
-+ u32 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ *ptr = readl((void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_outsw(unsigned long port, void *addr,
-+ u32 count)
-+{
-+ u16 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ writew(*ptr, (void __iomem *) port);
-+}
-+
-+static inline void magicbox_ide_outsl(unsigned long port, void *addr,
-+ u32 count)
-+{
-+ u32 *ptr;
-+
-+ for (ptr = addr; count--; ptr++)
-+ writel(*ptr, (void __iomem *) port);
-+}
-+
-+static void magicbox_ide_exec_command(ide_hwif_t *hwif, u8 cmd)
-+{
-+ magicbox_ide_outb(cmd, hwif->io_ports.command_addr);
-+}
-+
-+static u8 magicbox_ide_read_status(ide_hwif_t *hwif)
-+{
-+ return magicbox_ide_inb(hwif->io_ports.status_addr);
-+}
-+
-+static u8 magicbox_ide_read_altstatus(ide_hwif_t *hwif)
-+{
-+ return magicbox_ide_inb(hwif->io_ports.ctl_addr);
-+}
-+
-+static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
-+{
-+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-+ struct ide_taskfile *tf = &task->tf;
-+ u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
-+
-+ if (task->tf_flags & IDE_TFLAG_FLAGGED)
-+ HIHI = 0xFF;
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_DATA)
-+ writel((tf->hob_data << 8) | tf->data,
-+ (void __iomem *) io_ports->data_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
-+ magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
-+ magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
-+ magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
-+ magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
-+ magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
-+ magicbox_ide_outb(tf->feature, io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
-+ magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
-+ magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
-+ magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
-+ magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
-+ magicbox_ide_outb((tf->device & HIHI) | drive->select,
-+ io_ports->device_addr);
-+}
-+
-+static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
-+{
-+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-+ struct ide_taskfile *tf = &task->tf;
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_DATA) {
-+ u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
-+
-+ tf->data = data & 0xff;
-+ tf->hob_data = (data >> 8) & 0xff;
-+ }
-+
-+ /* be sure we're looking at the low order bits */
-+ magicbox_ide_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_NSECT)
-+ tf->nsect = magicbox_ide_inb(io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAL)
-+ tf->lbal = magicbox_ide_inb(io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAM)
-+ tf->lbam = magicbox_ide_inb(io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAH)
-+ tf->lbah = magicbox_ide_inb(io_ports->lbah_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
-+ tf->device = magicbox_ide_inb(io_ports->device_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_LBA48) {
-+ magicbox_ide_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
-+ tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
-+ tf->hob_nsect = magicbox_ide_inb(io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
-+ tf->hob_lbal = magicbox_ide_inb(io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
-+ tf->hob_lbam = magicbox_ide_inb(io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
-+ tf->hob_lbah = magicbox_ide_inb(io_ports->lbah_addr);
-+ }
-+}
-+
-+static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
-+ void *buf, unsigned int len)
-+{
-+ unsigned long port = drive->hwif->io_ports.data_addr;
-+
-+ len++;
-+
-+ if (drive->io_32bit) {
-+ magicbox_ide_insl(port, buf, len / 4);
-+
-+ if ((len & 3) >= 2)
-+ magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
-+ } else
-+ magicbox_ide_insw(port, buf, len / 2);
-+}
-+
-+static void magicbox_ide_output_data(ide_drive_t *drive, struct request *rq,
-+ void *buf, unsigned int len)
-+{
-+ unsigned long port = drive->hwif->io_ports.data_addr;
-+
-+ len++;
-+
-+ if (drive->io_32bit) {
-+ magicbox_ide_outsl(port, buf, len / 4);
-+
-+ if ((len & 3) >= 2)
-+ magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
-+ } else
-+ magicbox_ide_outsw(port, buf, len / 2);
-+}
-+
-+static void magicbox_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
-+{
-+}
-+
-+static u8 magicbox_ide_cable_detect(ide_hwif_t *hwif)
-+{
-+ return ATA_CBL_PATA40;
-+}
-+
-+static const struct ide_tp_ops magicbox_ide_tp_ops = {
-+ .exec_command = magicbox_ide_exec_command,
-+ .read_status = magicbox_ide_read_status,
-+ .read_altstatus = magicbox_ide_read_altstatus,
-+
-+ .set_irq = ide_set_irq,
-+ .tf_load = magicbox_ide_tf_load,
-+ .tf_read = magicbox_ide_tf_read,
-+
-+ .input_data = magicbox_ide_input_data,
-+ .output_data = magicbox_ide_output_data,
-+};
-+
-+static const struct ide_port_ops magicbox_ide_port_ops = {
-+ .set_pio_mode = magicbox_ide_set_pio_mode,
-+ .cable_detect = magicbox_ide_cable_detect,
-+};
-+
-+static const struct ide_port_info magicbox_ide_port_info = {
-+ .name = DRV_NAME,
-+ .chipset = ide_generic,
-+ .tp_ops = &magicbox_ide_tp_ops,
-+ .port_ops = &magicbox_ide_port_ops,
-+ .host_flags = IDE_HFLAG_SINGLE |
-+ IDE_HFLAG_NO_DMA |
-+ IDE_HFLAG_MMIO |
-+ IDE_HFLAG_UNMASK_IRQS,
-+ .pio_mask = ATA_PIO4,
-+};
-+
-+static inline void magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
-+ u16 __iomem *ctrl, int irq)
-+{
-+ unsigned long port = (unsigned long) base;
-+ int i;
-+
-+ memset(hw, 0, sizeof(*hw));
-+ for (i = 0; i <= 7; i++)
-+ hw->io_ports_array[i] = port + i * 2;
-+
-+ /*
-+ * the IDE control register is at ATA address 6,
-+ * with CS1 active instead of CS0
-+ */
-+ hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
-+
-+ hw->irq = irq;
-+ hw->chipset = ide_generic;
-+ hw->ack_intr = NULL;
-+}
-+
-+static int __devinit magicbox_ide_of_probe(struct of_device *op,
-+ const struct of_device_id *match)
-+{
-+ hw_regs_t hw;
-+ hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
-+ struct ide_host *host;
-+ u16 __iomem *base;
-+ u16 __iomem *ctrl;
-+ int irq;
-+ int ret = 0;
-+
-+ irq = irq_of_parse_and_map(op->node, 0);
-+ if (irq < 0) {
-+ dev_err(&op->dev, "invalid irq\n");
-+ ret = -EINVAL;
-+ goto err_exit;
-+ }
-+
-+ base = of_iomap(op->node, 0);
-+ if (base == NULL) {
-+ ret = -ENOMEM;
-+ goto err_exit;
-+ }
-+
-+ ctrl = of_iomap(op->node, 1);
-+ if (ctrl == NULL) {
-+ ret = -ENOMEM;
-+ goto err_unmap_base;
-+ }
-+
-+ magicbox_ide_setup_hw(&hw, base, ctrl, irq);
-+
-+ hw.dev = &op->dev;
-+
-+ ret = ide_host_add(&magicbox_ide_port_info, hws, &host);
-+ if (ret)
-+ goto err_unmap_ctrl;
-+
-+ dev_set_drvdata(&op->dev, host);
-+
-+ return 0;
-+
-+ err_unmap_ctrl:
-+ iounmap(ctrl);
-+ err_unmap_base:
-+ iounmap(base);
-+ err_exit:
-+ return ret;
-+}
-+
-+static struct of_device_id magicbox_ide_of_match[] = {
-+ { .compatible = "magicbox-cf", },
-+ {},
-+};
-+
-+static struct of_platform_driver magicbox_ide_of_platform_driver = {
-+ .owner = THIS_MODULE,
-+ .name = DRV_NAME,
-+ .match_table = magicbox_ide_of_match,
-+ .probe = magicbox_ide_of_probe,
-+ .driver = {
-+ .name = DRV_NAME,
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init magicbox_ide_init(void)
-+{
-+ return of_register_platform_driver(&magicbox_ide_of_platform_driver);
-+}
-+
-+module_init(magicbox_ide_init);
-+
-+MODULE_DESCRIPTION(DRV_DESC);
-+MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
-+MODULE_LICENSE("GPL v2");
-+MODULE_DEVICE_TABLE(of, magicbox_ide_of_match);