diff options
Diffstat (limited to 'target/linux/ramips/patches-4.3/0506-net-next-mediatek-add-support-for-rt3050.patch')
| -rw-r--r-- | target/linux/ramips/patches-4.3/0506-net-next-mediatek-add-support-for-rt3050.patch | 229 |
1 files changed, 229 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.3/0506-net-next-mediatek-add-support-for-rt3050.patch b/target/linux/ramips/patches-4.3/0506-net-next-mediatek-add-support-for-rt3050.patch new file mode 100644 index 0000000..69e06b0 --- /dev/null +++ b/target/linux/ramips/patches-4.3/0506-net-next-mediatek-add-support-for-rt3050.patch @@ -0,0 +1,229 @@ +From a3555658ce5dd97df3dc225289b92800da9d38ba Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Mon, 14 Dec 2015 21:28:51 +0100 +Subject: [PATCH 506/513] net-next: mediatek: add support for rt3050 + +Add support for SoCs from the rt3050 family. This include rt3050, rt3052, +rt3352 and rt5350. These all have a builtin 5 port 100mbit switch. This patch +includes rudimentary code to power up the switch. There are a lot of magic +values that get written to the switch and the internal phys. These values +come straight from the SDK driver and we do not know the meaning of most of +them. + +Signed-off-by: John Crispin <blogic@openwrt.org> +Signed-off-by: Felix Fietkau <nbd@openwrt.org> +Signed-off-by: Michael Lee <igvtee@gmail.com> +--- + drivers/net/ethernet/mediatek/esw_rt3050.c | 18 +--- + drivers/net/ethernet/mediatek/soc_rt3050.c | 158 ++++++++++++++++++++++++++++ + 2 files changed, 159 insertions(+), 17 deletions(-) + create mode 100644 drivers/net/ethernet/mediatek/soc_rt3050.c + +diff --git a/drivers/net/ethernet/mediatek/esw_rt3050.c b/drivers/net/ethernet/mediatek/esw_rt3050.c +index f07f4a5..670ae16 100644 +--- a/drivers/net/ethernet/mediatek/esw_rt3050.c ++++ b/drivers/net/ethernet/mediatek/esw_rt3050.c +@@ -14,27 +14,11 @@ + + #include <linux/module.h> + #include <linux/kernel.h> +-#include <linux/types.h> +-#include <linux/dma-mapping.h> +-#include <linux/init.h> +-#include <linux/skbuff.h> +-#include <linux/etherdevice.h> +-#include <linux/ethtool.h> + #include <linux/platform_device.h> +-#include <linux/of_device.h> +-#include <linux/clk.h> +-#include <linux/of_net.h> +-#include <linux/of_mdio.h> +- + #include <asm/mach-ralink/ralink_regs.h> + + #include "mtk_eth_soc.h" + +-#include <linux/ioport.h> +-#include <linux/mii.h> +- +-#include <ralink_regs.h> +- + /* HW limitations for this switch: + * - No large frame support (PKT_MAX_LEN at most 1536) + * - Can't have untagged vlan and tagged vlan on one port at the same time, +@@ -559,7 +543,7 @@ static irqreturn_t esw_interrupt(int irq, void *_esw) + + static int esw_probe(struct platform_device *pdev) + { +- struct resource *res = platform_get_resource(p, IORESOURCE_MEM, 0); ++ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + struct device_node *np = pdev->dev.of_node; + const __be32 *port_map, *reg_init; + struct rt305x_esw *esw; +diff --git a/drivers/net/ethernet/mediatek/soc_rt3050.c b/drivers/net/ethernet/mediatek/soc_rt3050.c +new file mode 100644 +index 0000000..228c94f +--- /dev/null ++++ b/drivers/net/ethernet/mediatek/soc_rt3050.c +@@ -0,0 +1,158 @@ ++/* This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Copyright (C) 2009-2015 John Crispin <blogic@openwrt.org> ++ * Copyright (C) 2009-2015 Felix Fietkau <nbd@openwrt.org> ++ * Copyright (C) 2013-2015 Michael Lee <igvtee@gmail.com> ++ */ ++ ++#include <linux/module.h> ++ ++#include <asm/mach-ralink/ralink_regs.h> ++ ++#include "mtk_eth_soc.h" ++#include "mdio_rt2880.h" ++ ++#define RT305X_RESET_FE BIT(21) ++#define RT305X_RESET_ESW BIT(23) ++ ++static const u16 rt5350_reg_table[FE_REG_COUNT] = { ++ [FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG, ++ [FE_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG, ++ [FE_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG, ++ [FE_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0, ++ [FE_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0, ++ [FE_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0, ++ [FE_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0, ++ [FE_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0, ++ [FE_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0, ++ [FE_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0, ++ [FE_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0, ++ [FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE, ++ [FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS, ++ [FE_REG_FE_RST_GL] = 0, ++ [FE_REG_FE_DMA_VID_BASE] = 0, ++}; ++ ++static void rt305x_init_data(struct fe_soc_data *data, ++ struct net_device *netdev) ++{ ++ struct fe_priv *priv = netdev_priv(netdev); ++ ++ priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_PADDING_BUG | ++ FE_FLAG_CALIBRATE_CLK | FE_FLAG_HAS_SWITCH; ++ netdev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | ++ NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX; ++} ++ ++static int rt3050_fwd_config(struct fe_priv *priv) ++{ ++ int ret; ++ ++ if (ralink_soc != RT305X_SOC_RT3052) { ++ ret = fe_set_clock_cycle(priv); ++ if (ret) ++ return ret; ++ } ++ ++ fe_fwd_config(priv); ++ if (ralink_soc != RT305X_SOC_RT3352) ++ fe_w32(FE_PSE_FQFC_CFG_INIT, FE_PSE_FQ_CFG); ++ fe_csum_config(priv); ++ ++ return 0; ++} ++ ++static void rt305x_fe_reset(void) ++{ ++ fe_reset(RT305X_RESET_FE); ++} ++ ++static void rt5350_init_data(struct fe_soc_data *data, ++ struct net_device *netdev) ++{ ++ struct fe_priv *priv = netdev_priv(netdev); ++ ++ priv->flags = FE_FLAG_HAS_SWITCH; ++ netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM; ++} ++ ++static void rt5350_set_mac(struct fe_priv *priv, unsigned char *mac) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&priv->page_lock, flags); ++ fe_w32((mac[0] << 8) | mac[1], RT5350_SDM_MAC_ADRH); ++ fe_w32((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5], ++ RT5350_SDM_MAC_ADRL); ++ spin_unlock_irqrestore(&priv->page_lock, flags); ++} ++ ++static void rt5350_rxcsum_config(bool enable) ++{ ++ if (enable) ++ fe_w32(fe_r32(RT5350_SDM_CFG) | (RT5350_SDM_ICS_EN | ++ RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN), ++ RT5350_SDM_CFG); ++ else ++ fe_w32(fe_r32(RT5350_SDM_CFG) & ~(RT5350_SDM_ICS_EN | ++ RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN), ++ RT5350_SDM_CFG); ++} ++ ++static int rt5350_fwd_config(struct fe_priv *priv) ++{ ++ struct net_device *dev = priv_netdev(priv); ++ ++ rt5350_rxcsum_config((dev->features & NETIF_F_RXCSUM)); ++ ++ return 0; ++} ++ ++static void rt5350_tx_dma(struct fe_tx_dma *txd) ++{ ++ txd->txd4 = 0; ++} ++ ++static void rt5350_fe_reset(void) ++{ ++ fe_reset(RT305X_RESET_FE | RT305X_RESET_ESW); ++} ++ ++static struct fe_soc_data rt3050_data = { ++ .init_data = rt305x_init_data, ++ .reset_fe = rt305x_fe_reset, ++ .fwd_config = rt3050_fwd_config, ++ .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS, ++ .checksum_bit = RX_DMA_L4VALID, ++ .rx_int = FE_RX_DONE_INT, ++ .tx_int = FE_TX_DONE_INT, ++ .status_int = FE_CNT_GDM_AF, ++}; ++ ++static struct fe_soc_data rt5350_data = { ++ .init_data = rt5350_init_data, ++ .reg_table = rt5350_reg_table, ++ .reset_fe = rt5350_fe_reset, ++ .set_mac = rt5350_set_mac, ++ .fwd_config = rt5350_fwd_config, ++ .tx_dma = rt5350_tx_dma, ++ .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS, ++ .checksum_bit = RX_DMA_L4VALID, ++ .rx_int = RT5350_RX_DONE_INT, ++ .tx_int = RT5350_TX_DONE_INT, ++}; ++ ++const struct of_device_id of_fe_match[] = { ++ { .compatible = "ralink,rt3050-eth", .data = &rt3050_data }, ++ { .compatible = "ralink,rt5350-eth", .data = &rt5350_data }, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, of_fe_match); +-- +1.7.10.4 + |