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-rw-r--r--target/linux/sunxi/patches-3.13/150-3-dt-sun7i-gmac-add-pinmuxing.patch53
1 files changed, 53 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.13/150-3-dt-sun7i-gmac-add-pinmuxing.patch b/target/linux/sunxi/patches-3.13/150-3-dt-sun7i-gmac-add-pinmuxing.patch
new file mode 100644
index 0000000..01523f0
--- /dev/null
+++ b/target/linux/sunxi/patches-3.13/150-3-dt-sun7i-gmac-add-pinmuxing.patch
@@ -0,0 +1,53 @@
+From 249ac8d24efdc07f521b796b96796ffa55abe0a5 Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Mon, 10 Feb 2014 18:35:50 +0800
+Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for the GMAC
+
+The A20 has EMAC and GMAC muxed on the same pins.
+Add pin sets with gmac function for MII and RGMII mode to the DTSI.
+
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+---
+ arch/arm/boot/dts/sun7i-a20.dtsi | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
+index 87eab0d..9bb6fdf 100644
+--- a/arch/arm/boot/dts/sun7i-a20.dtsi
++++ b/arch/arm/boot/dts/sun7i-a20.dtsi
+@@ -484,6 +484,32 @@
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
++
++ gmac_pins_mii_a: gmac_mii@0 {
++ allwinner,pins = "PA0", "PA1", "PA2",
++ "PA3", "PA4", "PA5", "PA6",
++ "PA7", "PA8", "PA9", "PA10",
++ "PA11", "PA12", "PA13", "PA14",
++ "PA15", "PA16";
++ allwinner,function = "gmac";
++ allwinner,drive = <0>;
++ allwinner,pull = <0>;
++ };
++
++ gmac_pins_rgmii_a: gmac_rgmii@0 {
++ allwinner,pins = "PA0", "PA1", "PA2",
++ "PA3", "PA4", "PA5", "PA6",
++ "PA7", "PA8", "PA10",
++ "PA11", "PA12", "PA13",
++ "PA15", "PA16";
++ allwinner,function = "gmac";
++ /*
++ * data lines in RGMII mode use DDR mode
++ * and need a higher signal drive strength
++ */
++ allwinner,drive = <3>;
++ allwinner,pull = <0>;
++ };
+ };
+
+ timer@01c20c00 {
+--
+1.8.5.5
+