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-rw-r--r--target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch2
-rw-r--r--target/linux/sunxi/patches-4.9/0051-stmmac-form-4-11.patch2
-rw-r--r--target/linux/sunxi/patches-4.9/0053-stmmac-form-4-13.patch2
3 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch b/target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch
index 7549d49..22d62f0 100644
--- a/target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch
+++ b/target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch
@@ -770,7 +770,7 @@
};
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
-@@ -380,8 +380,8 @@ static int socfpga_dwmac_resume(struct d
+@@ -390,8 +390,8 @@ static int socfpga_dwmac_resume(struct d
* control register 0, and can be modified by the phy driver
* framework.
*/
diff --git a/target/linux/sunxi/patches-4.9/0051-stmmac-form-4-11.patch b/target/linux/sunxi/patches-4.9/0051-stmmac-form-4-11.patch
index cd3e52a..2ce23e2 100644
--- a/target/linux/sunxi/patches-4.9/0051-stmmac-form-4-11.patch
+++ b/target/linux/sunxi/patches-4.9/0051-stmmac-form-4-11.patch
@@ -597,7 +597,7 @@
{ .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops },
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
-@@ -341,7 +341,7 @@ static int socfpga_dwmac_probe(struct pl
+@@ -351,7 +351,7 @@ static int socfpga_dwmac_probe(struct pl
* mode. Create a copy of the core reset handle so it can be used by
* the driver later.
*/
diff --git a/target/linux/sunxi/patches-4.9/0053-stmmac-form-4-13.patch b/target/linux/sunxi/patches-4.9/0053-stmmac-form-4-13.patch
index d71821a..abdc618 100644
--- a/target/linux/sunxi/patches-4.9/0053-stmmac-form-4-13.patch
+++ b/target/linux/sunxi/patches-4.9/0053-stmmac-form-4-13.patch
@@ -47,7 +47,7 @@
struct mii_regs {
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
-@@ -269,7 +269,10 @@ static int socfpga_dwmac_set_phy_mode(st
+@@ -270,7 +270,10 @@ static int socfpga_dwmac_set_phy_mode(st
ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
ctrl |= val << reg_shift;