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* ar71xx: ag71xx: check PHY IDs before accessing the switch registersGabor Juhos2011-12-151-9/+8
| | | | SVN-Revision: 29541
* ar71xx: ag71xx: don't use port 4 of the switch, it is not connected on ar724xGabor Juhos2011-12-151-13/+25
| | | | SVN-Revision: 29540
* ar71xx: ag71xx: nuke ar7240sw_initGabor Juhos2011-12-151-6/+1
| | | | SVN-Revision: 29539
* ar71xx: check squashfs signature in TP-Link mtd parserGabor Juhos2011-12-051-1/+31
| | | | SVN-Revision: 29446
* ar71xx: add mtd partition parser for the TP-Link boardsGabor Juhos2011-12-031-0/+165
| | | | SVN-Revision: 29415
* ar71xx: add AR71XX_ prefix to GPIO_REG_* definesGabor Juhos2011-11-141-36/+40
| | | | SVN-Revision: 29123
* ar71xx: merge nand scan patchGabor Juhos2011-11-142-2/+2
| | | | SVN-Revision: 29122
* ar71xx: ag71xx: add support for getting switch port link statusGabor Juhos2011-11-131-0/+67
| | | | SVN-Revision: 29017
* ar71xx: ag71xx: remove unused mii_ctrl field from struct ag71xxGabor Juhos2011-11-132-19/+1
| | | | SVN-Revision: 29015
* ar71xx: ag71xx: remove unused mii_cfg related functions and definesGabor Juhos2011-11-131-40/+0
| | | | SVN-Revision: 29014
* ar71xx: set MII interface speed from the set_speed callbacksGabor Juhos2011-11-131-6/+0
| | | | SVN-Revision: 29013
* ar71xx: rename set_pll callback to set_speed in ag71xx_platform_dataGabor Juhos2011-11-131-2/+2
| | | | | | Also rename the corresponding callback functions. SVN-Revision: 29012
* ar71xx: ag71xx: remove MII interface setup codeGabor Juhos2011-11-132-15/+0
| | | | SVN-Revision: 29011
* ar71xx: ag71xx: use fixed link parameters if the mii bus is not registeredGabor Juhos2011-11-121-0/+4
| | | | SVN-Revision: 28977
* ar71xx: remove dead codeFelix Fietkau2011-11-081-15/+0
| | | | SVN-Revision: 28851
* ar71xx: on ar7240, exclude ports from their own port vlan destination maskFelix Fietkau2011-11-081-2/+1
| | | | SVN-Revision: 28850
* ag71xx: close a race between the phy state machine and link stateJonas Gorski2011-10-081-3/+7
| | | | | | | | | | | A fast stop/start cycle could leave the ag71xx interrupts and tx engine disabled when using a phy driver with a fixed link and the start/stop happens between two phy state machine polls. Prevent this by always forcing the link down on stop regardless of phy state and having a phy connected. SVN-Revision: 28380
* ar71xx: fix register range check for DMA stuck checks (thx, Frédéric Moulins)Felix Fietkau2011-09-111-1/+1
| | | | SVN-Revision: 28213
* ar71xx: add some code to detect DMA stuck conditions on ar7240Felix Fietkau2011-08-132-1/+33
| | | | SVN-Revision: 27975
* ar71xx: on ar724x only reset the link status in the restart handler, the ↵Felix Fietkau2011-08-131-0/+6
| | | | | | fast reset takes care of DMA stuck issues SVN-Revision: 27973
* ar71xx: fix ethernet FIFO state corruption on ar7240Felix Fietkau2011-08-042-20/+61
| | | | | | | | | When starting/stopping DMA sometimes the FIFO state gets corrupted, leading to wildly fluctuating latencies or packet data corruption. Fix this by issuing a fast MAC reset as soon as the link is detected as up. Fixes #9689, #9405 SVN-Revision: 27896
* ag71xx: fix memory corruption issues on ar7240 on ethernet start/stopFelix Fietkau2011-08-042-3/+19
| | | | | | | | | | | When the DMA engine state gets corrupted due to a hardware issues, it often won't stop rx until a full reset is issued. In that case the hardware must keep a valid descriptor, otherwise it will write to random places in system RAM, triggering random crashes. To fix this, keep a dummy descriptor without a buffer that keeps the DMA engine in a sane state until the reset is done SVN-Revision: 27895
* ar71xx: fix MAC/MDIO reset mask handlingFelix Fietkau2011-08-041-2/+2
| | | | SVN-Revision: 27894
* ar71xx: reinitialize global switch settings after reset on ar7240Felix Fietkau2011-07-201-23/+24
| | | | SVN-Revision: 27705
* ar71xx: configure address aging on ar7240Felix Fietkau2011-07-201-2/+12
| | | | SVN-Revision: 27704
* ar71xx: reset the phy in the ethernet init on ar724xFelix Fietkau2011-07-201-0/+13
| | | | SVN-Revision: 27703
* ar71xx: make sure that rx and interrupts are disabled before issuing the ↵Felix Fietkau2011-07-201-7/+9
| | | | | | hardware reset SVN-Revision: 27702
* ar71xx: increase the delay after the ethernet MAC resetFelix Fietkau2011-07-201-1/+1
| | | | SVN-Revision: 27701
* ar71xx: fix an unused variable warningFelix Fietkau2011-07-201-1/+0
| | | | SVN-Revision: 27700
* ar71xx: do not reset the hardware on transmit timeout - this would mess up ↵Felix Fietkau2011-07-091-4/+0
| | | | | | the up the PHY state SVN-Revision: 27568
* ag71xx: keep the rx engine stopped while the link is not up, should ↵Felix Fietkau2011-07-091-91/+91
| | | | | | hopefully fix stability issues from #9405 SVN-Revision: 27567
* ar71xx: merge 2.6.39 patchesGabor Juhos2011-06-291-678/+0
| | | | | | Also remove the old UART driver for ar933x. SVN-Revision: 27314
* ar71xx: add 2.6.39 supportGabor Juhos2011-06-291-0/+688
| | | | SVN-Revision: 27310
* ar71xx: cleanup AR933X UART driverGabor Juhos2011-06-191-481/+141
| | | | SVN-Revision: 27222
* ar71xx: use ar933x_uart.h in the AR933X serial driverGabor Juhos2011-06-131-339/+75
| | | | SVN-Revision: 27166
* ar71xx: setup wdt_clock for AR913X to avoid a kernel bugGabor Juhos2011-06-041-0/+2
| | | | | | Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com> SVN-Revision: 27102
* Revert "ar71xx: only enable the rx engine after the link is up..."Felix Fietkau2011-06-011-68/+67
| | | | | | It messes up the DMA state when the link goes down SVN-Revision: 27088
* ar71xx: add serial driver for the AR933X UARTGabor Juhos2011-05-311-0/+1282
| | | | SVN-Revision: 27065
* ar71xx: the watchdog uses the reference clock on the AR933x SoCsGabor Juhos2011-05-311-2/+12
| | | | SVN-Revision: 27060
* ar71xx: Fix header offset for newer WRT160NL modelsGabor Juhos2011-05-311-9/+16
| | | | | | | | | | | | Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K, resulting in miscalculated partition sizes. Since the actual sizes did not change, hardcode them to their current sizes, and make sure they are at least one erase block big (in case Cisco decides to start to use chips with 128K erase blocks). Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com> SVN-Revision: 27049
* ar71xx: ag71xx: make ring sizes configurable via ethtoolGabor Juhos2011-05-312-0/+56
| | | | SVN-Revision: 27041
* ar71xx: ag71xx: prepare to make ring sizes configurableGabor Juhos2011-05-313-35/+32
| | | | SVN-Revision: 27040
* ar71xx: ag71xx: nuke unused AG71XX_TX_FIFO_LEN defineGabor Juhos2011-05-311-1/+0
| | | | | | Reported-by: Dave Täht <dave.taht@gmail.com> SVN-Revision: 27039
* ar71xx: only enable the rx engine after the link is up, fixes a race ↵Felix Fietkau2011-05-301-67/+68
| | | | | | condition that got rx stuck when the interface is brought up during lots of inbound traffic (thx, matteo) SVN-Revision: 27035
* ar71xx: disable flow control for ar724x, it can get stuck in a loop of ↵Felix Fietkau2011-05-301-5/+1
| | | | | | continously sending MAC pause frames SVN-Revision: 27034
* ar71xx: detect link on LAN portsMatteo Croce2011-05-173-3/+32
| | | | SVN-Revision: 26922
* use correct macros and frame size in ag71xxMatteo Croce2011-05-141-3/+2
| | | | SVN-Revision: 26890
* ar71xx: ag71xx: make switch register access atomicGabor Juhos2011-05-081-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reading of the PHY registers occasionally returns with bogus values under heavy load. This misleads the PHY driver and thus causes false link/speed change notifications which leads to performance loss. This is easily noticable during an iperf session: ... [ 3] 52.0-53.0 sec 11.3 MBytes 94.4 Mbits/sec [ 3] 53.0-54.0 sec 11.4 MBytes 95.4 Mbits/sec eth1: link down br-lan: port 2(eth1) entering forwarding state eth1: link up (100Mbps/Full duplex) br-lan: port 2(eth1) entering forwarding state br-lan: port 2(eth1) entering forwarding state [ 3] 54.0-55.0 sec 6.75 MBytes 56.6 Mbits/sec [ 3] 55.0-56.0 sec 0.00 Bytes 0.00 bits/sec [ 3] 56.0-57.0 sec 10.5 MBytes 88.1 Mbits/sec ... [ 3] 169.0-170.0 sec 11.4 MBytes 95.4 Mbits/sec [ 3] 170.0-171.0 sec 11.4 MBytes 95.4 Mbits/sec eth1: link up (10Mbps/Half duplex) [ 3] 171.0-172.0 sec 7.63 MBytes 64.0 Mbits/sec [ 3] 172.0-173.0 sec 9.38 MBytes 78.6 Mbits/sec eth1: link up (100Mbps/Full duplex) [ 3] 173.0-174.0 sec 11.3 MBytes 94.4 Mbits/sec [ 3] 174.0-175.0 sec 11.4 MBytes 95.4 Mbits/sec SVN-Revision: 26856
* ar71xx: ag71xx: fix section mismatch warningsGabor Juhos2011-05-082-2/+2
| | | | | | | | | | | | | | | | | | The function __devinit ag71xx_probe() references a function __devexit ag71xx_phy_disconnect(). This is often seen when error handling in the init function uses functionality in the exit path. The fix is often to remove the __devexit annotation of ag71xx_phy_disconnect() so it may be used outside an exit section. The function ag71xx_phy_disconnect() references a function in an exit section. Often the function ag71xx_ar7240_cleanup() has valid usage outside the exit section and the fix is to remove the __devexit annotation of ag71xx_ar7240_cleanup. SVN-Revision: 26855
* ar71xx: ag71xx: fix build error if debugfs is enabledGabor Juhos2011-05-081-2/+3
| | | | SVN-Revision: 26854
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