| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ar71xx: use correct fractional dividers for {CPU,DDR}_PLL on QCA955x | Gabor Juhos | 2012-09-10 | 1 | -2/+2 |
| * | ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x | Gabor Juhos | 2012-09-08 | 1 | -6/+6 |
| * | ar71xx: add initial support for the QCA955X SoCs | Gabor Juhos | 2012-07-05 | 1 | -0/+167 |
 |
index : mtk-20170518 | |
| MTK 20170518 : Mediatek SDK based on OpenWRT Barrier Breaker |
| summaryrefslogtreecommitdiff |
path: root/target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch